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Searched refs:wb_info (Results 1 – 9 of 9) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dcn30/
A Ddcn30_hwseq.c221 struct dc_writeback_info *wb_info, in dcn30_set_writeback() argument
228 ASSERT(wb_info->wb_enabled); in dcn30_set_writeback()
229 ASSERT(wb_info->mpcc_inst >= 0); in dcn30_set_writeback()
236 wb_info->dwb_pipe_inst, wb_info->mpcc_inst); in dcn30_set_writeback()
251 wb_info->mpcc_inst); in dcn30_update_writeback()
262 struct dc_writeback_info *wb_info) in dcn30_mmhubbub_warmup() argument
333 wb_info->mpcc_inst); in dcn30_enable_writeback()
373 struct dc_writeback_info wb_info; in dcn30_program_all_writeback_pipes_in_tree() local
394 if (wb_info.wb_enabled) { in dcn30_program_all_writeback_pipes_in_tree()
397 wb_info.mpcc_inst = -1; in dcn30_program_all_writeback_pipes_in_tree()
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A Ddcn30_hwseq.h40 struct dc_writeback_info *wb_info,
44 struct dc_writeback_info *wb_info,
53 struct dc_writeback_info *wb_info);
A Ddcn30_resource.c1501 if (wb_info->wb_enabled && wb_info->writeback_source_plane && in dcn30_populate_dml_writeback_from_context()
1506 wb_info->dwb_params.cnv_params.crop_height : in dcn30_populate_dml_writeback_from_context()
1507 wb_info->dwb_params.cnv_params.src_height; in dcn30_populate_dml_writeback_from_context()
1509 wb_info->dwb_params.cnv_params.crop_width : in dcn30_populate_dml_writeback_from_context()
1510 wb_info->dwb_params.cnv_params.src_width; in dcn30_populate_dml_writeback_from_context()
1525 (double)wb_info->dwb_params.cnv_params.crop_width / in dcn30_populate_dml_writeback_from_context()
1526 (double)wb_info->dwb_params.dest_width : in dcn30_populate_dml_writeback_from_context()
1527 (double)wb_info->dwb_params.cnv_params.src_width / in dcn30_populate_dml_writeback_from_context()
1528 (double)wb_info->dwb_params.dest_width; in dcn30_populate_dml_writeback_from_context()
1531 (double)wb_info->dwb_params.dest_height : in dcn30_populate_dml_writeback_from_context()
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/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
A Ddcn20_fpu.c73 struct dc_writeback_info *wb_info = &res_ctx->pipe_ctx[i].stream->writeback_info[0]; in dcn20_populate_dml_writeback_from_context() local
79 pipes[pipe_cnt].dout.wb_enable = (wb_info->wb_enabled == true) ? 1 : 0; in dcn20_populate_dml_writeback_from_context()
81 pipes[pipe_cnt].dout.wb.wb_src_height = wb_info->dwb_params.cnv_params.crop_height; in dcn20_populate_dml_writeback_from_context()
82 pipes[pipe_cnt].dout.wb.wb_src_width = wb_info->dwb_params.cnv_params.crop_width; in dcn20_populate_dml_writeback_from_context()
83 pipes[pipe_cnt].dout.wb.wb_dst_width = wb_info->dwb_params.dest_width; in dcn20_populate_dml_writeback_from_context()
84 pipes[pipe_cnt].dout.wb.wb_dst_height = wb_info->dwb_params.dest_height; in dcn20_populate_dml_writeback_from_context()
87 pipes[pipe_cnt].dout.wb.wb_htaps_chroma = wb_info->dwb_params.scaler_taps.h_taps_c; in dcn20_populate_dml_writeback_from_context()
88 pipes[pipe_cnt].dout.wb.wb_vtaps_chroma = wb_info->dwb_params.scaler_taps.v_taps_c; in dcn20_populate_dml_writeback_from_context()
91 if (wb_info->dwb_params.out_format == dwb_scaler_mode_yuv420) { in dcn20_populate_dml_writeback_from_context()
92 if (wb_info->dwb_params.output_depth == DWB_OUTPUT_PIXEL_DEPTH_8BPC) in dcn20_populate_dml_writeback_from_context()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_stream.c433 struct dc_writeback_info *wb_info) in dc_stream_add_writeback() argument
444 if (wb_info == NULL) { in dc_stream_add_writeback()
449 if (wb_info->dwb_pipe_inst >= MAX_DWB_PIPES) { in dc_stream_add_writeback()
456 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
465 stream->writeback_info[i] = *wb_info; in dc_stream_add_writeback()
471 stream->writeback_info[stream->num_wb_info++] = *wb_info; in dc_stream_add_writeback()
476 struct dwbc *dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dc_stream_add_writeback()
491 dc->hwss.update_writeback(dc, wb_info, dc->current_state); in dc_stream_add_writeback()
494 dc->hwss.enable_writeback(dc, wb_info, dc->current_state); in dc_stream_add_writeback()
552 struct dc_writeback_info *wb_info) in dc_stream_warmup_writeback() argument
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/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dhw_sequencer.h176 struct dc_writeback_info *wb_info,
179 struct dc_writeback_info *wb_info,
186 struct dc_writeback_info *wb_info);
/linux/drivers/gpu/drm/amd/display/dc/
A Ddc_stream.h390 struct dc_writeback_info *wb_info);
402 struct dc_writeback_info *wb_info);
/linux/drivers/gpu/drm/amd/display/dc/dcn20/
A Ddcn20_hwseq.h106 struct dc_writeback_info *wb_info,
A Ddcn20_hwseq.c1908 struct dc_writeback_info *wb_info, in dcn20_enable_writeback() argument
1915 ASSERT(wb_info->dwb_pipe_inst < MAX_DWB_PIPES); in dcn20_enable_writeback()
1916 ASSERT(wb_info->wb_enabled); in dcn20_enable_writeback()
1917 dwb = dc->res_pool->dwbc[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
1918 mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst]; in dcn20_enable_writeback()
1922 optc->funcs->set_dwb_source(optc, wb_info->dwb_pipe_inst); in dcn20_enable_writeback()
1924 …mcif_wb->funcs->config_mcif_buf(mcif_wb, &wb_info->mcif_buf_params, wb_info->dwb_params.dest_heigh… in dcn20_enable_writeback()
1925 …mcif_wb->funcs->config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info-… in dcn20_enable_writeback()
1929 dwb->funcs->enable(dwb, &wb_info->dwb_params); in dcn20_enable_writeback()

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