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/linux/drivers/pci/endpoint/
A Dpci-epc-mem.c65 epc->windows = kcalloc(num_windows, sizeof(*epc->windows), GFP_KERNEL); in pci_epc_multi_mem_init()
66 if (!epc->windows) in pci_epc_multi_mem_init()
98 epc->windows[i] = mem; in pci_epc_multi_mem_init()
101 epc->mem = epc->windows[0]; in pci_epc_multi_mem_init()
108 mem = epc->windows[i]; in pci_epc_multi_mem_init()
112 kfree(epc->windows); in pci_epc_multi_mem_init()
147 mem = epc->windows[i]; in pci_epc_mem_exit()
151 kfree(epc->windows); in pci_epc_mem_exit()
153 epc->windows = NULL; in pci_epc_mem_exit()
180 mem = epc->windows[i]; in pci_epc_mem_alloc_addr()
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/linux/drivers/mailbox/
A Darm_mhuv2.c181 unsigned int windows; member
232 u32 windows; member
351 const int windows = priv->windows; in mhuv2_data_transfer_read_data() local
450 int windows = priv->windows; in mhuv2_data_transfer_send_data() local
481 data += windows; in mhuv2_data_transfer_send_data()
522 offset += windows; in get_irq_chan_comb()
810 if (offset < windows) in mhuv2_mbox_of_xlate()
814 offset -= windows; in mhuv2_mbox_of_xlate()
843 if (!windows) { in mhuv2_verify_protocol()
897 priv->windows = windows; in mhuv2_allocate_channels()
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/linux/Documentation/devicetree/bindings/mailbox/
A Darm,mhuv2.yaml15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
16 communication with remote processor(s), where the number of channel windows
34 channel windows.
86 The MHUv2 controller may contain up to 124 channel windows (each 32-bit
90 This property allows a platform to describe how these channel windows are
100 The second field of a tuple signifies the number of channel windows where
103 windows that implement the doorbell protocol. For data-transfer protocol,
104 this field signifies the number of 32-bit channel windows that implement
109 of windows here than what the platform implements.
118 controller, where a total of 15 channel windows are used. The first two
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/linux/drivers/gpu/drm/nouveau/dispnv50/
A Dcorec37d.c37 const u32 windows = 8; /*XXX*/ in corec37d_wndw_owner() local
40 if ((ret = PUSH_WAIT(push, windows * 2))) in corec37d_wndw_owner()
43 for (i = 0; i < windows; i++) { in corec37d_wndw_owner()
131 const u32 windows = 8; /*XXX*/ in corec37d_init() local
134 if ((ret = PUSH_WAIT(push, 2 + windows * 5))) in corec37d_init()
139 for (i = 0; i < windows; i++) { in corec37d_init()
A Dcorec57d.c33 const u32 windows = 8; /*XXX*/ in corec57d_init() local
36 if ((ret = PUSH_WAIT(push, 2 + windows * 5))) in corec57d_init()
41 for (i = 0; i < windows; i++) { in corec57d_init()
/linux/Documentation/devicetree/bindings/iio/chemical/
A Dsenseair,sunrise.yaml17 https://rmtplusstoragesenseair.blob.core.windows.net/docs/Dev/publicerat/PSP11704.pdf
18 https://rmtplusstoragesenseair.blob.core.windows.net/docs/Dev/publicerat/PSH11649.pdf
19 https://rmtplusstoragesenseair.blob.core.windows.net/docs/Dev/publicerat/TDE5531.pdf
20 https://rmtplusstoragesenseair.blob.core.windows.net/docs/Market/publicerat/TDE7318.pdf
/linux/Documentation/devicetree/bindings/pci/
A Dsocionext,uniphier-pcie-ep.yaml59 num-ib-windows:
62 num-ob-windows:
95 num-ib-windows = <16>;
96 num-ob-windows = <16>;
A Dsnps,dw-pcie-ep.yaml57 num-ib-windows:
58 description: number of inbound address translation windows
62 num-ob-windows:
63 description: number of outbound address translation windows
A Dmobiveil-pcie.txt4 has up to 8 outbound and inbound windows for the address translation.
21 - apio-wins : number of requested apio outbound windows
22 default 2 outbound windows are configured -
25 - ppio-wins : number of requested ppio inbound windows
A Dti-pci.txt52 - num-ib-windows : number of inbound address translation windows
53 - num-ob-windows : number of outbound address translation windows
A Dti,am65-pci-ep.yaml69 num-ib-windows = <16>;
70 num-ob-windows = <16>;
/linux/Documentation/admin-guide/media/
A Dlmedm04.rst12 The Sharp 7395 driver can be found in windows/system32/drivers
57 only found in windows/system32/drivers
69 The Sharp 0194 tuner driver can be found in windows/system32/drivers
90 The m88rs2000 tuner driver can be found in windows/system32/drivers
/linux/drivers/pci/controller/
A Dpcie-iproc-bcma.c62 pci_add_resource(&bridge->windows, &pcie->mem); in iproc_pcie_bcma_probe()
63 ret = devm_request_pci_bus_resources(dev, &bridge->windows); in iproc_pcie_bcma_probe()
71 return iproc_pcie_setup(pcie, &bridge->windows); in iproc_pcie_bcma_probe()
/linux/Documentation/driver-api/
A Dvme.rst59 The driver can request ownership of one or more master windows
60 (:c:func:`vme_master_request`), slave windows (:c:func:`vme_slave_request`)
64 attributes of the driver in question. For slave windows these attributes are
66 bus cycle types required in 'cycle'. Master windows add a further set of
84 Master windows
87 Master windows provide access from the local processor[s] out onto the VME bus.
88 The number of windows available and the available access modes is dependent on
106 :c:func:`vme_master_write` used to write to configured master windows.
113 Slave windows
117 local memory. The number of windows available and the access modes that can be
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/linux/Documentation/devicetree/bindings/powerpc/fsl/
A Decm.txt9 windows are configured. For ECM based devices this is the first 4k
11 number of local access windows as specified by fsl,num-laws.
31 windows for this device.
A Dmcm.txt9 windows are configured. For MCM based devices this is the first 4k
11 number of local access windows as specified by fsl,num-laws.
31 windows for this device.
/linux/drivers/pinctrl/renesas/
A Dcore.c33 struct sh_pfc_window *windows; in sh_pfc_map_resources() local
54 windows = devm_kcalloc(pfc->dev, num_windows, sizeof(*windows), in sh_pfc_map_resources()
56 if (windows == NULL) in sh_pfc_map_resources()
60 pfc->windows = windows; in sh_pfc_map_resources()
75 windows->phys = res->start; in sh_pfc_map_resources()
76 windows->size = resource_size(res); in sh_pfc_map_resources()
77 windows->virt = devm_ioremap_resource(pfc->dev, res); in sh_pfc_map_resources()
78 if (IS_ERR(windows->virt)) in sh_pfc_map_resources()
80 windows++; in sh_pfc_map_resources()
96 window = pfc->windows + i; in sh_pfc_phys_to_virt()
/linux/Documentation/powerpc/
A Dpci_iov_resource_on_powernv.rst58 contain two "windows", depending on the value of PCI address bit 59.
63 - For MSIs, we have two windows in the address space (one at the top of
74 Like other PCI host bridges, the Power8 IODA2 PHB supports "windows"
76 window and sixteen M64 windows. They have different characteristics.
101 SR-IOV). We basically use the trick of forcing the bridge MMIO windows
110 - The M64 windows:
123 * Support overlaps. If an address is covered by multiple windows,
155 We would like to investigate using additional M64 windows in "single
209 use several M64 windows, they can be set to different base addresses
222 The IODA2 platform has 16 M64 windows, which are used to map MMIO
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/linux/arch/m68k/coldfire/
A Dpci.c232 pci_add_resource(&bridge->windows, &ioport_resource); in mcf_pci_init()
233 pci_add_resource(&bridge->windows, &iomem_resource); in mcf_pci_init()
234 pci_add_resource(&bridge->windows, &busn_resource); in mcf_pci_init()
/linux/arch/alpha/kernel/
A Dsys_nautilus.c214 pci_add_resource(&bridge->windows, &ioport_resource); in nautilus_init_pci()
217 pci_add_resource(&bridge->windows, &irongate_mem); in nautilus_init_pci()
219 pci_add_resource(&bridge->windows, &busn_resource); in nautilus_init_pci()
/linux/Documentation/devicetree/bindings/bus/
A Dmvebu-mbus.txt37 size for the address decoding windows allocated for
106 entries for translation that do not correspond to valid windows (S = 0xf)
198 The mbus-node ranges property defines a set of mbus windows that are expected
203 chooses to use a different set of mbus windows, it must ensure that any address
206 The operating system may insert additional mbus windows that do not conflict
210 is needed to set up the other windows.
/linux/drivers/pci/
A Dhost-bridge.c58 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_resource_to_bus()
83 resource_list_for_each_entry(window, &bridge->windows) { in pcibios_bus_to_resource()
A Dof.c556 INIT_LIST_HEAD(&bridge->windows); in pci_parse_request_of_pci_ranges()
559 err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &bridge->windows, in pci_parse_request_of_pci_ranges()
564 err = devm_request_pci_bus_resources(dev, &bridge->windows); in pci_parse_request_of_pci_ranges()
568 resource_list_for_each_entry_safe(win, tmp, &bridge->windows) { in pci_parse_request_of_pci_ranges()
/linux/drivers/ntb/hw/idt/
A DKconfig19 with chosen valid aperture. For memory windows related BARs the
20 aperture settings shall determine the maximum size of memory windows
/linux/Documentation/gpu/
A Dtegra.rst86 A display controller controls a set of windows that can be used to composite
88 ordering to individual windows (by programming the corresponding blending
90 assume a fixed Z ordering of the windows (window A is the root window, that
91 is, the lowest, while windows B and C are overlaid on top of window A). The
92 overlay windows support multiple pixel formats and can automatically convert

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