Searched refs:wm_set (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| A D | dcn301_fpu.c | 219 struct dcn_watermarks *wm_set, in calculate_wm_set_for_vlevel() argument
236 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
237 …wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) … in calculate_wm_set_for_vlevel()
238 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
239 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
240 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
241 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
242 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
243 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_clk_mgr.c | 469 struct dcn31_watermarks *table = clk_mgr_dcn31->smu_wm_set.wm_set; in dcn31_notify_wm_ranges()
650 clk_mgr->smu_wm_set.wm_set = (struct dcn31_watermarks *)dm_helpers_allocate_gpu_mem( in dcn31_clk_mgr_construct()
656 if (!clk_mgr->smu_wm_set.wm_set) { in dcn31_clk_mgr_construct()
657 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in dcn31_clk_mgr_construct()
660 ASSERT(clk_mgr->smu_wm_set.wm_set); in dcn31_clk_mgr_construct()
724 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in dcn31_clk_mgr_destroy()
726 clk_mgr->smu_wm_set.wm_set); in dcn31_clk_mgr_destroy()
|
| A D | dcn31_clk_mgr.h | 33 struct dcn31_watermarks *wm_set; member
|
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | vg_clk_mgr.c | 458 struct watermarks *table = clk_mgr_vgh->smu_wm_set.wm_set; in vg_notify_wm_ranges()
750 clk_mgr->smu_wm_set.wm_set = (struct watermarks *)dm_helpers_allocate_gpu_mem( in vg_clk_mgr_construct()
756 if (clk_mgr->smu_wm_set.wm_set == 0) { in vg_clk_mgr_construct()
757 clk_mgr->smu_wm_set.wm_set = &dummy_wms; in vg_clk_mgr_construct()
760 ASSERT(clk_mgr->smu_wm_set.wm_set); in vg_clk_mgr_construct()
830 if (clk_mgr->smu_wm_set.wm_set && clk_mgr->smu_wm_set.mc_address.quad_part != 0) in vg_clk_mgr_destroy()
832 clk_mgr->smu_wm_set.wm_set); in vg_clk_mgr_destroy()
|
| A D | vg_clk_mgr.h | 33 struct watermarks *wm_set; member
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn20/ |
| A D | dcn20_hubbub.c | 495 s->wm_set = 0; in hubbub2_wm_read_state()
506 s->wm_set = 1; in hubbub2_wm_read_state()
517 s->wm_set = 2; in hubbub2_wm_read_state()
528 s->wm_set = 3; in hubbub2_wm_read_state()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn21/ |
| A D | dcn21_resource.c | 1037 struct dcn_watermarks *wm_set, in calculate_wm_set_for_vlevel() argument
1054 wm_set->urgent_ns = get_wm_urgent(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1055 …wm_set->cstate_pstate.cstate_enter_plus_exit_ns = get_wm_stutter_enter_exit(dml, pipes, pipe_cnt) … in calculate_wm_set_for_vlevel()
1056 wm_set->cstate_pstate.cstate_exit_ns = get_wm_stutter_exit(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1057 wm_set->cstate_pstate.pstate_change_ns = get_wm_dram_clock_change(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1058 wm_set->pte_meta_urgent_ns = get_wm_memory_trip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1059 wm_set->frac_urg_bw_nom = get_fraction_of_urgent_bandwidth(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1060 wm_set->frac_urg_bw_flip = get_fraction_of_urgent_bandwidth_imm_flip(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
1061 wm_set->urgent_latency_ns = get_urgent_latency(dml, pipes, pipe_cnt) * 1000; in calculate_wm_set_for_vlevel()
|
| A D | dcn21_hubbub.c | 627 s->wm_set = 0; in hubbub21_wm_read_state()
641 s->wm_set = 1; in hubbub21_wm_read_state()
655 s->wm_set = 2; in hubbub21_wm_read_state()
669 s->wm_set = 3; in hubbub21_wm_read_state()
|
| /linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| A D | dcn10_hubbub.c | 53 s->wm_set = 0; in hubbub1_wm_read_state()
63 s->wm_set = 1; in hubbub1_wm_read_state()
73 s->wm_set = 2; in hubbub1_wm_read_state()
83 s->wm_set = 3; in hubbub1_wm_read_state()
|
| A D | dcn10_hw_sequencer_debug.c | 96 s->wm_set, in dcn10_get_hubbub_state()
|
| A D | dcn10_hw_sequencer.c | 151 DTN_INFO("WM_Set[%d]:", s->wm_set); in dcn10_log_hubbub_state()
|
| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | dchubbub.h | 44 uint32_t wm_set; member
|
Completed in 26 milliseconds