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Searched refs:wp (Results 1 – 25 of 507) sorted by relevance

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/linux/drivers/gpu/drm/omapdrm/dss/
A Dhdmi_wp.c44 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
53 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
102 int hdmi_wp_video_start(struct hdmi_wp_data *wp) in hdmi_wp_video_start() argument
109 void hdmi_wp_video_stop(struct hdmi_wp_data *wp) in hdmi_wp_video_stop() argument
178 if (wp->version == 4) in hdmi_wp_video_config_timing()
233 if (wp->version == 4) { in hdmi_wp_audio_config_format()
285 if (IS_ERR(wp->base)) in hdmi_wp_init()
286 return PTR_ERR(wp->base); in hdmi_wp_init()
288 wp->phys_base = res->start; in hdmi_wp_init()
289 wp->version = version; in hdmi_wp_init()
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A Dhdmi.h239 struct hdmi_wp_data *wp; member
261 struct hdmi_wp_data *wp; member
296 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
297 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
299 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
305 void hdmi_wp_video_config_format(struct hdmi_wp_data *wp,
309 void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
320 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp);
339 void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp,
341 void hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp,
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A Dhdmi5.c67 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
70 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
71 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
172 hdmi_wp_set_irqstatus(&hdmi->wp, in hdmi_power_on_full()
173 hdmi_wp_get_irqstatus(&hdmi->wp)); in hdmi_power_on_full()
204 r = hdmi_wp_video_start(&hdmi->wp); in hdmi_power_on_full()
208 hdmi_wp_set_irqenable(&hdmi->wp, in hdmi_power_on_full()
230 hdmi_wp_video_stop(&hdmi->wp); in hdmi_power_off_full()
252 hdmi_wp_dump(&hdmi->wp, s); in hdmi_dump_regs()
265 hdmi_wp_audio_enable(&hd->wp, true); in hdmi_start_audio_stream()
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A Dhdmi4.c66 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
69 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
70 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
149 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_power_on_full() local
205 r = hdmi_wp_video_start(&hdmi->wp); in hdmi_power_on_full()
209 hdmi_wp_set_irqenable(wp, in hdmi_power_on_full()
231 hdmi_wp_video_stop(&hdmi->wp); in hdmi_power_off_full()
253 hdmi_wp_dump(&hdmi->wp, s); in hdmi_dump_regs()
265 hdmi_wp_audio_enable(&hd->wp, true); in hdmi_start_audio_stream()
271 hdmi4_audio_stop(&hd->core, &hd->wp); in hdmi_stop_audio_stream()
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A Dhdmi_pll.c42 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
50 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
60 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
63 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
147 if (hpll->wp->version == 4) in hdmi_init_pll_data()
162 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) in hdmi_pll_init() argument
168 pll->wp = wp; in hdmi_pll_init()
A Dhdmi4_cec.c176 hdmi_wp_clear_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
177 hdmi_wp_set_irqstatus(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
178 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi_cec_adap_enable()
190 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0x18, 5, 0); in hdmi_cec_adap_enable()
213 hdmi_wp_set_irqenable(core->wp, HDMI_IRQ_CORE); in hdmi_cec_adap_enable()
250 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi_cec_adap_enable()
338 struct hdmi_wp_data *wp) in hdmi4_cec_init() argument
349 core->wp = wp; in hdmi4_cec_init()
352 REG_FLD_MOD(core->wp->base, HDMI_WP_CLK, 0, 5, 0); in hdmi4_cec_init()
/linux/drivers/video/fbdev/omap2/omapfb/dss/
A Dhdmi_wp.c45 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
47 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
54 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
103 int hdmi_wp_video_start(struct hdmi_wp_data *wp) in hdmi_wp_video_start() argument
110 void hdmi_wp_video_stop(struct hdmi_wp_data *wp) in hdmi_wp_video_stop() argument
154 r = hdmi_read_reg(wp->base, HDMI_WP_VIDEO_CFG); in hdmi_wp_video_config_interface()
159 hdmi_write_reg(wp->base, HDMI_WP_VIDEO_CFG, r); in hdmi_wp_video_config_interface()
267 wp->phys_base = res->start; in hdmi_wp_init()
270 if (IS_ERR(wp->base)) { in hdmi_wp_init()
272 return PTR_ERR(wp->base); in hdmi_wp_init()
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A Dhdmi.h233 struct hdmi_wp_data *wp; member
277 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
278 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
280 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
286 void hdmi_wp_video_config_format(struct hdmi_wp_data *wp,
288 void hdmi_wp_video_config_interface(struct hdmi_wp_data *wp,
290 void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
302 struct hdmi_wp_data *wp);
320 void hdmi_wp_audio_config_format(struct hdmi_wp_data *wp,
322 void hdmi_wp_audio_config_dma(struct hdmi_wp_data *wp,
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A Dhdmi5.c66 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
69 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
70 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
180 hdmi_wp_set_irqstatus(&hdmi.wp, in hdmi_power_on_full()
181 hdmi_wp_get_irqstatus(&hdmi.wp)); in hdmi_power_on_full()
214 r = hdmi_wp_video_start(&hdmi.wp); in hdmi_power_on_full()
222 hdmi_wp_set_irqenable(&hdmi.wp, in hdmi_power_on_full()
228 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_on_full()
248 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_off_full()
299 hdmi_wp_dump(&hdmi.wp, s); in hdmi_dump_regs()
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A Dhdmi4.c62 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
65 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
66 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
149 struct hdmi_wp_data *wp = &hdmi.wp; in hdmi_power_on_full() local
197 r = hdmi_wp_video_start(&hdmi.wp); in hdmi_power_on_full()
205 hdmi_wp_set_irqenable(wp, in hdmi_power_on_full()
211 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_on_full()
231 hdmi_wp_video_stop(&hdmi.wp); in hdmi_power_off_full()
278 hdmi_wp_dump(&hdmi.wp, s); in hdmi_dump_regs()
306 hdmi_wp_audio_enable(&hd->wp, true); in hdmi_start_audio_stream()
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A Dhdmi_pll.c102 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
106 return hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
112 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
114 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
215 struct hdmi_wp_data *wp) in hdmi_pll_init() argument
219 pll->wp = wp; in hdmi_pll_init()
/linux/arch/powerpc/math-emu/
A Dmath_efp.c108 u32 wp[2]; member
209 pr_debug("vc: %08x %08x\n", vc.wp[0], vc.wp[1]); in do_spe_mathemu()
234 vc.wp[1] = va.wp[1] & ~SIGN_BIT_S; in do_spe_mathemu()
238 vc.wp[1] = va.wp[1] | SIGN_BIT_S; in do_spe_mathemu()
242 vc.wp[1] = va.wp[1] ^ SIGN_BIT_S; in do_spe_mathemu()
516 vc.wp[0] = va.wp[0] & ~SIGN_BIT_S; in do_spe_mathemu()
517 vc.wp[1] = va.wp[1] & ~SIGN_BIT_S; in do_spe_mathemu()
521 vc.wp[0] = va.wp[0] | SIGN_BIT_S; in do_spe_mathemu()
522 vc.wp[1] = va.wp[1] | SIGN_BIT_S; in do_spe_mathemu()
526 vc.wp[0] = va.wp[0] ^ SIGN_BIT_S; in do_spe_mathemu()
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/linux/lib/mpi/
A Dmpi-add.c22 mpi_ptr_t wp, up; in mpi_add_ui() local
37 wp = w->d; in mpi_add_ui()
40 wp[0] = v; in mpi_add_ui()
45 wp[usize] = cy; in mpi_add_ui()
52 wp[0] = v - up[0]; in mpi_add_ui()
69 mpi_ptr_t wp, up, vp; in mpi_add() local
94 wp = w->d; in mpi_add()
98 MPN_COPY(wp, up, usize); in mpi_add()
106 MPN_NORMALIZE(wp, wsize); in mpi_add()
111 MPN_NORMALIZE(wp, wsize); in mpi_add()
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A Dmpi-mul.c19 mpi_ptr_t up, vp, wp; in mpi_mul() local
42 wp = w->d; in mpi_mul()
47 if (wp == up || wp == vp) { in mpi_mul()
48 wp = mpi_alloc_limb_space(wsize); in mpi_mul()
52 wp = w->d; in mpi_mul()
55 if (wp == up) { in mpi_mul()
59 if (wp == vp) in mpi_mul()
62 MPN_COPY(up, wp, usize); in mpi_mul()
63 } else if (wp == vp) { in mpi_mul()
67 MPN_COPY(vp, wp, vsize); in mpi_mul()
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A Dec.c191 wp[i] = wp[i] ^ x; in mpih_set_cond()
217 mpihelp_add_n(wp, wp, n, wsize); in ec_addm_25519()
238 mpihelp_add_n(wp, wp, n, wsize); in ec_subm_25519()
276 cy = mpihelp_add_n(wp, wp, m, wsize); in ec_mulm_25519()
283 mpihelp_add_n(wp, wp, m, wsize); in ec_mulm_25519()
286 cy = mpihelp_sub_n(wp, wp, ctx->p->d, wsize); in ec_mulm_25519()
288 mpihelp_add_n(wp, wp, m, wsize); in ec_mulm_25519()
323 mpihelp_sub_n(wp, wp, n, wsize); in ec_addm_448()
343 mpihelp_add_n(wp, wp, n, wsize); in ec_subm_448()
435 mpihelp_add_n(wp, wp, n, wsize); in ec_mulm_448()
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A Dgeneric_mpih-lshift.c28 mpihelp_lshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned int cnt) in mpihelp_lshift() argument
36 wp += 1; in mpihelp_lshift()
44 wp[i] = (high_limb << sh_1) | (low_limb >> sh_2); in mpihelp_lshift()
47 wp[i] = high_limb << sh_1; in mpihelp_lshift()
A Dgeneric_mpih-rshift.c29 mpihelp_rshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned cnt) in mpihelp_rshift() argument
37 wp -= 1; in mpihelp_rshift()
44 wp[i] = (low_limb >> sh_1) | (high_limb << sh_2); in mpihelp_rshift()
47 wp[i] = low_limb >> sh_1; in mpihelp_rshift()
/linux/tools/testing/selftests/breakpoints/
A Dbreakpoint_test_arm64.c81 static bool set_watchpoint(pid_t pid, int size, int wp) in set_watchpoint() argument
83 const volatile uint8_t *addr = &var[32 + wp]; in set_watchpoint()
112 static bool run_test(int wr_size, int wp_size, int wr, int wp) in run_test() argument
143 if (!set_watchpoint(pid, wp_size, wp)) in run_test()
204 int wr, wp, size; in main() local
216 for (wp = wr - size; wp <= wr + size; wp = wp + size) { in main()
217 result = run_test(size, MIN(size, 8), wr, wp); in main()
218 if ((result && wr == wp) || in main()
219 (!result && wr != wp)) in main()
222 size, wr, wp); in main()
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/linux/sound/hda/
A Dhdac_controller.c70 bus->rirb.wp = bus->rirb.rp = 0; in snd_hdac_bus_init_cmd_io()
145 unsigned int wp, rp; in snd_hdac_bus_send_cmd() local
153 if (wp == 0xffff) { in snd_hdac_bus_send_cmd()
158 wp++; in snd_hdac_bus_send_cmd()
159 wp %= AZX_MAX_CORB_ENTRIES; in snd_hdac_bus_send_cmd()
162 if (wp == rp) { in snd_hdac_bus_send_cmd()
189 unsigned int rp, wp; in snd_hdac_bus_update_rirb() local
194 if (wp == 0xffff) { in snd_hdac_bus_update_rirb()
199 if (wp == bus->rirb.wp) in snd_hdac_bus_update_rirb()
201 bus->rirb.wp = wp; in snd_hdac_bus_update_rirb()
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/linux/arch/ia64/kernel/
A Dpatch.c147 u64 *wp; in ia64_patch_mckinley_e9() local
160 wp = (u64 *) ia64_imva((char *) offp + *offp); in ia64_patch_mckinley_e9()
161 wp[0] = 0x0000000100000011UL; /* nop.m 0; nop.i 0; br.ret.sptk.many b6 */ in ia64_patch_mckinley_e9()
162 wp[1] = 0x0084006880000200UL; in ia64_patch_mckinley_e9()
163 wp[2] = 0x0000000100000000UL; /* nop.m 0; nop.i 0; nop.i 0 */ in ia64_patch_mckinley_e9()
164 wp[3] = 0x0004000000000200UL; in ia64_patch_mckinley_e9()
165 ia64_fc(wp); ia64_fc(wp + 2); in ia64_patch_mckinley_e9()
/linux/lib/raid6/
A Dneon.uc62 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
70 wq$$ = wp$$ = vld1q_u8(&dptr[z0][d+$$*NSIZE]);
73 wp$$ = veorq_u8(wp$$, wd$$);
81 vst1q_u8(&p[d+NSIZE*$$], wp$$);
93 register unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
102 wp$$ = veorq_u8(vld1q_u8(&p[d+$$*NSIZE]), wq$$);
107 wp$$ = veorq_u8(wp$$, wd$$);
149 vst1q_u8(&p[d+NSIZE*$$], wp$$);
A Dint.uc88 unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
95 wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
98 wp$$ ^= wd$$;
105 *(unative_t *)&p[d+NSIZE*$$] = wp$$;
117 unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
125 wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
128 wp$$ ^= wd$$;
142 *(unative_t *)&p[d+NSIZE*$$] ^= wp$$;
/linux/arch/arm/kernel/
A Dhw_breakpoint.c744 wp = slots[i]; in watchpoint_handler()
745 if (wp == NULL) in watchpoint_handler()
756 info = counter_arch_bp(wp); in watchpoint_handler()
794 perf_bp_event(wp, regs); in watchpoint_handler()
809 wp = slots[closest_match]; in watchpoint_handler()
810 info = counter_arch_bp(wp); in watchpoint_handler()
813 perf_bp_event(wp, regs); in watchpoint_handler()
832 wp = slots[i]; in watchpoint_single_step_handler()
834 if (wp == NULL) in watchpoint_single_step_handler()
837 info = counter_arch_bp(wp); in watchpoint_single_step_handler()
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/linux/drivers/block/null_blk/
A Dzoned.c127 zone->wp = zone->start + zone->len; in null_init_zoned_dev()
138 zone->start = zone->wp = sector; in null_init_zoned_dev()
215 blkz.wp = zone->wp; in null_report_zones()
242 sector + nr_sectors <= zone->wp) in null_zone_valid_read_len()
245 if (sector > zone->wp) in null_zone_valid_read_len()
270 if (zone->wp == zone->start) { in __null_close_zone()
397 sector = zone->wp; in null_zone_write()
402 } else if (sector != zone->wp) { in null_zone_write()
438 zone->wp += nr_sectors; in null_zone_write()
552 zone->wp = zone->start + zone->len; in null_finish_zone()
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/linux/sound/pci/lola/
A Dlola.c88 unsigned int wp = chip->corb.wp + 1; in corb_send_verb() local
89 wp %= LOLA_CORB_ENTRIES; in corb_send_verb()
90 chip->corb.wp = wp; in corb_send_verb()
91 chip->corb.buf[wp * 2] = cpu_to_le32(data); in corb_send_verb()
93 lola_writew(chip, BAR0, CORBWP, wp); in corb_send_verb()
111 unsigned int rp, wp; in lola_update_rirb() local
114 wp = lola_readw(chip, BAR0, RIRBWP); in lola_update_rirb()
115 if (wp == chip->rirb.wp) in lola_update_rirb()
117 chip->rirb.wp = wp; in lola_update_rirb()
119 while (chip->rirb.rp != wp) { in lola_update_rirb()
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