/linux/drivers/phy/qualcomm/ |
A D | phy-qcom-apq8064-sata.c | 91 writel_relaxed(0x01, base + SATA_PHY_SER_CTRL); in qcom_apq8064_sata_phy_init() 99 writel_relaxed(0x01, base + SATA_PHY_RX_IMCAL0); in qcom_apq8064_sata_phy_init() 100 writel_relaxed(0x01, base + SATA_PHY_TX_IMCAL0); in qcom_apq8064_sata_phy_init() 101 writel_relaxed(0x02, base + SATA_PHY_TX_IMCAL2); in qcom_apq8064_sata_phy_init() 127 writel_relaxed(0x02, base + UNIPHY_PLL_GLB_CFG); in qcom_apq8064_sata_phy_init() 131 writel_relaxed(0x03, base + UNIPHY_PLL_GLB_CFG); in qcom_apq8064_sata_phy_init() 157 writel_relaxed(0x01, base + SATA_PHY_RX_IMCAL0); in qcom_apq8064_sata_phy_init() 164 writel_relaxed(0x00, base + SATA_PHY_PI_CTRL0); in qcom_apq8064_sata_phy_init() 169 writel_relaxed(0x43, base + SATA_PHY_ALIGNP); in qcom_apq8064_sata_phy_init() 170 writel_relaxed(0x04, base + SATA_PHY_OOB_TERM); in qcom_apq8064_sata_phy_init() [all …]
|
/linux/drivers/gpu/drm/meson/ |
A D | meson_venc.c | 1163 writel_relaxed(de_h_begin, in meson_venc_hdmi_mode_set() 1165 writel_relaxed(de_h_end, in meson_venc_hdmi_mode_set() 1196 writel_relaxed(hs_begin, in meson_venc_hdmi_mode_set() 1198 writel_relaxed(hs_end, in meson_venc_hdmi_mode_set() 1215 writel_relaxed(hs_begin, in meson_venc_hdmi_mode_set() 1217 writel_relaxed(hs_begin, in meson_venc_hdmi_mode_set() 1227 writel_relaxed(hs_begin, in meson_venc_hdmi_mode_set() 1410 writel_relaxed(de_h_begin, in meson_venc_hdmi_mode_set() 1412 writel_relaxed(de_h_end, in meson_venc_hdmi_mode_set() 1460 writel_relaxed(hs_begin, in meson_venc_hdmi_mode_set() [all …]
|
A D | meson_crtc.c | 107 writel_relaxed(0 << 16 | in meson_g12a_crtc_atomic_enable() 110 writel_relaxed(0 << 16 | in meson_g12a_crtc_atomic_enable() 251 writel_relaxed(priv->viu.osd1_blk2_cfg4, in meson_crtc_g12a_enable_osd1_afbc() 257 writel_relaxed(priv->viu.osd1_blk1_cfg4, in meson_crtc_g12a_enable_osd1_afbc() 277 writel_relaxed(priv->viu.osb_blend0_size, in meson_g12a_crtc_enable_osd1() 280 writel_relaxed(priv->viu.osb_blend1_size, in meson_g12a_crtc_enable_osd1() 302 writel_relaxed(VD_BLEND_PREBLD_SRC_VD1 | in meson_g12a_crtc_enable_vd1() 308 writel_relaxed(priv->viu.vd1_afbc ? in meson_g12a_crtc_enable_vd1() 348 writel_relaxed(priv->viu.osd_sc_ctrl0, in meson_crtc_irq() 401 writel_relaxed(priv->viu.vd1_afbc_en, in meson_crtc_irq() [all …]
|
A D | meson_vpp.c | 59 writel_relaxed(is_horizontal ? VPP_SCALE_HORIZONTAL_COEF : 0, in meson_vpp_write_scaling_filter_coefs() 62 writel_relaxed(coefs[i], in meson_vpp_write_scaling_filter_coefs() 87 writel_relaxed(coefs[i], in meson_vpp_write_vd_scaling_filter_coefs() 99 writel_relaxed(VPP_PPS_DUMMY_DATA_MODE, in meson_vpp_init() 101 writel_relaxed(0x1020080, in meson_vpp_init() 108 writel_relaxed(VPP_OFIFO_SIZE_DEFAULT, in meson_vpp_init() 132 writel_relaxed(4096, in meson_vpp_init() 134 writel_relaxed(4096, in meson_vpp_init() 139 writel_relaxed(0, priv->io_base + _REG(VPP_OSD_SC_CTRL0)); in meson_vpp_init() 140 writel_relaxed(0, priv->io_base + _REG(VPP_OSD_VSC_CTRL0)); in meson_vpp_init() [all …]
|
/linux/drivers/media/platform/qcom/camss/ |
A D | camss-csiphy-3ph-1-0.c | 190 writel_relaxed(val, csiphy->base + in csiphy_isr() 198 writel_relaxed(0x0, csiphy->base + in csiphy_isr() 252 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l)); in csiphy_gen1_config_lanes() 255 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG2(l)); in csiphy_gen1_config_lanes() 258 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG3(l)); in csiphy_gen1_config_lanes() 281 writel_relaxed(val, csiphy->base + in csiphy_gen1_config_lanes() 286 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG1(l)); in csiphy_gen1_config_lanes() 292 writel_relaxed(val, csiphy->base + CSIPHY_3PH_LNn_CFG4(l)); in csiphy_gen1_config_lanes() 318 writel_relaxed(val, csiphy->base + r->reg_addr); in csiphy_gen2_config_lanes() 392 writel_relaxed(0, csiphy->base + in csiphy_lanes_disable() [all …]
|
A D | camss-vfe-4-8.c | 270 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set() 295 writel_relaxed(VFE_0_BUS_BDG_CMD_HALT_REQ, in vfe_halt_request() 385 writel_relaxed(reg, vfe->base + in vfe_wm_line_based() 394 writel_relaxed(reg, vfe->base + in vfe_wm_line_based() 397 writel_relaxed(0, vfe->base + in vfe_wm_line_based() 399 writel_relaxed(0, vfe->base + in vfe_wm_line_based() 416 writel_relaxed(reg, in vfe_wm_set_framedrop_period() 449 writel_relaxed(addr, in vfe_wm_set_ping_addr() 455 writel_relaxed(addr, in vfe_wm_set_pong_addr() 473 writel_relaxed(0, vfe->base + VFE_0_BUS_CFG); in vfe_bus_enable_wr_if() [all …]
|
A D | camss-csid-170.c | 389 writel_relaxed(val, csid->base + CSID_RDI_CFG0(0)); in csid_configure_stream() 393 writel_relaxed(val, csid->base + CSID_RDI_CFG1(0)); in csid_configure_stream() 420 writel_relaxed(val, csid->base + CSID_RDI_CTRL(0)); in csid_configure_stream() 434 writel_relaxed(val, csid->base + CSID_TPG_CTRL); in csid_configure_stream() 453 writel_relaxed(val, csid->base + CSID_RDI_CTRL(0)); in csid_configure_stream() 511 writel_relaxed(val, csid->base + CSID_IRQ_CMD); in csid_isr() 532 writel_relaxed(1, csid->base + CSID_TOP_IRQ_CLEAR); in csid_reset() 533 writel_relaxed(1, csid->base + CSID_IRQ_CMD); in csid_reset() 534 writel_relaxed(1, csid->base + CSID_TOP_IRQ_MASK); in csid_reset() 535 writel_relaxed(1, csid->base + CSID_IRQ_CMD); in csid_reset() [all …]
|
A D | camss-vfe-4-7.c | 287 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set() 312 writel_relaxed(VFE_0_BUS_BDG_CMD_HALT_REQ, in vfe_halt_request() 412 writel_relaxed(reg, vfe->base + in vfe_wm_line_based() 421 writel_relaxed(reg, vfe->base + in vfe_wm_line_based() 424 writel_relaxed(0, vfe->base + in vfe_wm_line_based() 426 writel_relaxed(0, vfe->base + in vfe_wm_line_based() 443 writel_relaxed(reg, in vfe_wm_set_framedrop_period() 450 writel_relaxed(pattern, in vfe_wm_set_framedrop_pattern() 477 writel_relaxed(addr, in vfe_wm_set_ping_addr() 483 writel_relaxed(addr, in vfe_wm_set_pong_addr() [all …]
|
A D | camss-csiphy-2ph-1-0.c | 44 writel_relaxed(0x1, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET); in csiphy_reset() 46 writel_relaxed(0x0, csiphy->base + CAMSS_CSI_PHY_GLBL_RESET); in csiphy_reset() 94 writel_relaxed(0x1, csiphy->base + in csiphy_lanes_enable() 96 writel_relaxed(0x1, csiphy->base + in csiphy_lanes_enable() 112 writel_relaxed(0x10, csiphy->base + in csiphy_lanes_enable() 114 writel_relaxed(settle_cnt, csiphy->base + in csiphy_lanes_enable() 116 writel_relaxed(0x3f, csiphy->base + in csiphy_lanes_enable() 118 writel_relaxed(0x3f, csiphy->base + in csiphy_lanes_enable() 136 writel_relaxed(0x0, csiphy->base + in csiphy_lanes_disable() 158 writel_relaxed(val, csiphy->base + in csiphy_isr() [all …]
|
A D | camss-vfe-4-1.c | 241 writel_relaxed(bits | set_bits, vfe->base + reg); in vfe_reg_set() 261 writel_relaxed(VFE_0_BUS_BDG_CMD_HALT_REQ, in vfe_halt_request() 319 writel_relaxed(reg, vfe->base + in vfe_wm_line_based() 328 writel_relaxed(reg, vfe->base + in vfe_wm_line_based() 331 writel_relaxed(0, vfe->base + in vfe_wm_line_based() 333 writel_relaxed(0, vfe->base + in vfe_wm_line_based() 350 writel_relaxed(reg, in vfe_wm_set_framedrop_period() 357 writel_relaxed(pattern, in vfe_wm_set_framedrop_pattern() 380 writel_relaxed(addr, in vfe_wm_set_ping_addr() 386 writel_relaxed(addr, in vfe_wm_set_pong_addr() [all …]
|
/linux/drivers/clocksource/ |
A D | timer-gx6605s.c | 30 writel_relaxed(GX6605S_STATUS_CLR, base + TIMER_STATUS); in gx6605s_timer_interrupt() 31 writel_relaxed(0, base + TIMER_INI); in gx6605s_timer_interrupt() 43 writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL); in gx6605s_timer_set_oneshot() 58 writel_relaxed(GX6605S_CONTRL_RST, base + TIMER_CONTRL); in gx6605s_timer_set_next_event() 61 writel_relaxed(ULONG_MAX - delta, base + TIMER_INI); in gx6605s_timer_set_next_event() 71 writel_relaxed(0, base + TIMER_CONTRL); in gx6605s_timer_shutdown() 72 writel_relaxed(0, base + TIMER_CONFIG); in gx6605s_timer_shutdown() 105 writel_relaxed(0, base + TIMER_DIV); in gx6605s_clkevt_init() 106 writel_relaxed(0, base + TIMER_CONFIG); in gx6605s_clkevt_init() 114 writel_relaxed(0, base + TIMER_DIV); in gx6605s_clksrc_init() [all …]
|
A D | timer-lpc32xx.c | 80 writel_relaxed(delta, ddata->base + LPC32XX_TIMER_MR0); in lpc32xx_clkevt_next_event() 92 writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_shutdown() 106 writel_relaxed(0, ddata->base + LPC32XX_TIMER_TCR); in lpc32xx_clkevt_oneshot() 109 writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R | in lpc32xx_clkevt_oneshot() 120 writel_relaxed(LPC32XX_TIMER_MCR_MR0I | LPC32XX_TIMER_MCR_MR0R, in lpc32xx_clkevt_periodic() 191 writel_relaxed(0, base + LPC32XX_TIMER_PR); in lpc32xx_clocksource_init() 192 writel_relaxed(0, base + LPC32XX_TIMER_MCR); in lpc32xx_clocksource_init() 193 writel_relaxed(0, base + LPC32XX_TIMER_CTCR); in lpc32xx_clocksource_init() 257 writel_relaxed(0, base + LPC32XX_TIMER_TCR); in lpc32xx_clockevent_init() 258 writel_relaxed(0, base + LPC32XX_TIMER_PR); in lpc32xx_clockevent_init() [all …]
|
A D | asm9260_timer.c | 113 writel_relaxed(delta, priv.base + HW_MR0); in asm9260_timer_set_next_event() 115 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + SET_REG); in asm9260_timer_set_next_event() 122 writel_relaxed(BM_C0_EN, priv.base + HW_TCR + CLR_REG); in __asm9260_timer_shutdown() 136 writel_relaxed(BM_MCR_RES_EN(0) | BM_MCR_STOP_EN(0), in asm9260_timer_set_oneshot() 146 writel_relaxed(BM_MCR_RES_EN(0) | BM_MCR_STOP_EN(0), in asm9260_timer_set_periodic() 173 writel_relaxed(BM_IR_MR0, priv.base + HW_IR); in asm9260_timer_interrupt() 217 writel_relaxed(BM_DIR_DEFAULT, priv.base + HW_DIR); in asm9260_timer_init() 219 writel_relaxed(BM_PR_DISABLE, priv.base + HW_PR); in asm9260_timer_init() 221 writel_relaxed(BM_CTCR_DEFAULT, priv.base + HW_CTCR); in asm9260_timer_init() 223 writel_relaxed(BM_MCR_INT_EN(0) , priv.base + HW_MCR); in asm9260_timer_init() [all …]
|
/linux/drivers/crypto/ux500/cryp/ |
A D | cryp.c | 218 writel_relaxed(key_value.key_value_left, in cryp_configure_key_values() 220 writel_relaxed(key_value.key_value_right, in cryp_configure_key_values() 224 writel_relaxed(key_value.key_value_left, in cryp_configure_key_values() 226 writel_relaxed(key_value.key_value_right, in cryp_configure_key_values() 230 writel_relaxed(key_value.key_value_left, in cryp_configure_key_values() 232 writel_relaxed(key_value.key_value_right, in cryp_configure_key_values() 236 writel_relaxed(key_value.key_value_left, in cryp_configure_key_values() 238 writel_relaxed(key_value.key_value_right, in cryp_configure_key_values() 366 writel_relaxed(ctx->key_4_l, ®->key_4_l); in cryp_restore_device_context() 367 writel_relaxed(ctx->key_4_r, ®->key_4_r); in cryp_restore_device_context() [all …]
|
/linux/arch/arm/mach-hisi/ |
A D | hotplug.c | 83 writel_relaxed(CPU2_ISO_CTRL << (cpu - 2), in set_cpu_hi3620() 93 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620() 96 writel_relaxed(val << cpu, ctrl_base + SCCPURSTEN); in set_cpu_hi3620() 100 writel_relaxed(CPU2_ISO_CTRL << (cpu - 2), in set_cpu_hi3620() 107 writel_relaxed(val, ctrl_base + SCPERCTRL0); in set_cpu_hi3620() 117 writel_relaxed(val, ctrl_base + SCPERCTRL0); in set_cpu_hi3620() 124 writel_relaxed(CPU2_ISO_CTRL << (cpu - 2), in set_cpu_hi3620() 132 writel_relaxed(val << cpu, ctrl_base + SCCPURSTEN); in set_cpu_hi3620() 136 writel_relaxed(CPU2_ISO_CTRL << (cpu - 2), in set_cpu_hi3620() 240 writel_relaxed(temp, ctrl_base + HIP01_PERI9); in hip01_set_cpu() [all …]
|
/linux/drivers/perf/ |
A D | qcom_l3_pmu.c | 203 writel_relaxed(gang, l3pmu->regs + L3_M_BC_GANG); in qcom_l3_cache__64bit_counter_start() 207 writel_relaxed(0, l3pmu->regs + L3_HML3_PM_EVCNTR(idx + 1)); in qcom_l3_cache__64bit_counter_start() 208 writel_relaxed(0, l3pmu->regs + L3_HML3_PM_EVCNTR(idx)); in qcom_l3_cache__64bit_counter_start() 286 writel_relaxed(0, l3pmu->regs + L3_HML3_PM_EVCNTR(idx)); in qcom_l3_cache__32bit_counter_start() 354 writel_relaxed(BC_RESET, l3pmu->regs + L3_M_BC_CR); in qcom_l3_cache__init() 364 writel_relaxed(PMOVSRCLR_RESET, l3pmu->regs + L3_M_BC_OVSR); in qcom_l3_cache__init() 365 writel_relaxed(BC_GANG_RESET, l3pmu->regs + L3_M_BC_GANG); in qcom_l3_cache__init() 367 writel_relaxed(PM_CR_RESET, l3pmu->regs + L3_HML3_PM_CR); in qcom_l3_cache__init() 399 writel_relaxed(status, l3pmu->regs + L3_M_BC_OVSR); in qcom_l3_cache__handle_irq() 434 writel_relaxed(BC_ENABLE, l3pmu->regs + L3_M_BC_CR); in qcom_l3_cache__pmu_enable() [all …]
|
/linux/drivers/mailbox/ |
A D | pl320-ipc.c | 64 writel_relaxed(data[i], ipc_base + IPCMxDR(mbox, i)); in __ipc_send() 65 writel_relaxed(0x1, ipc_base + IPCMxSEND(mbox)); in __ipc_send() 106 writel_relaxed(0, ipc_base + IPCMxSEND(IPC_TX_MBOX)); in ipc_handler() 112 writel_relaxed(2, ipc_base + IPCMxSEND(IPC_RX_MBOX)); in ipc_handler() 138 writel_relaxed(0, ipc_base + IPCMxSEND(IPC_TX_MBOX)); in pl320_probe() 146 writel_relaxed(CHAN_MASK(A9_SOURCE), in pl320_probe() 148 writel_relaxed(CHAN_MASK(M3_SOURCE), in pl320_probe() 150 writel_relaxed(CHAN_MASK(M3_SOURCE) | CHAN_MASK(A9_SOURCE), in pl320_probe() 154 writel_relaxed(CHAN_MASK(M3_SOURCE), in pl320_probe() 156 writel_relaxed(CHAN_MASK(A9_SOURCE), in pl320_probe() [all …]
|
/linux/drivers/video/fbdev/mmp/hw/ |
A D | mmp_ctrl.c | 42 writel_relaxed(~isr, ctrl->reg_base + SPU_IRQ_ISR); in ctrl_handle_irq() 139 writel_relaxed(win->pitch[0], in overlay_set_win() 141 writel_relaxed(win->pitch[2] << 16 | win->pitch[1], in overlay_set_win() 144 writel_relaxed((win->ysrc << 16) | win->xsrc, in overlay_set_win() 146 writel_relaxed((win->ydst << 16) | win->xdst, in overlay_set_win() 148 writel_relaxed(win->ypos << 16 | win->xpos, in overlay_set_win() 153 writel_relaxed((win->ysrc << 16) | win->xsrc, in overlay_set_win() 155 writel_relaxed((win->ydst << 16) | win->xdst, in overlay_set_win() 157 writel_relaxed(win->ypos << 16 | win->xpos, in overlay_set_win() 278 writel_relaxed((mode->yres << 16) | mode->xres, in path_set_mode() [all …]
|
/linux/drivers/soc/qcom/ |
A D | qcom-geni-se.c | 196 writel_relaxed(val, base + SE_IRQ_EN); in geni_se_io_set_mode() 200 writel_relaxed(val, base + SE_GENI_DMA_MODE_EN); in geni_se_io_set_mode() 202 writel_relaxed(0, base + SE_GSI_EVENT_EN); in geni_se_io_set_mode() 211 writel_relaxed(val, base + GENI_CGC_CTRL); in geni_se_io_init() 216 writel_relaxed(val, base + SE_DMA_GENERAL_CFG); in geni_se_io_init() 224 writel_relaxed(0, se->base + SE_GSI_EVENT_EN); in geni_se_irq_clear() 229 writel_relaxed(0xffffffff, se->base + SE_IRQ_EN); in geni_se_irq_clear() 254 writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN); in geni_se_init() 258 writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN); in geni_se_init() 284 writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN); in geni_se_select_fifo_mode() [all …]
|
/linux/drivers/usb/phy/ |
A D | phy-tegra-usb.c | 433 writel_relaxed(val, base + USB_SUSP_CTRL); in utmi_phy_clk_disable() 439 writel_relaxed(val, base + USB_SUSP_CTRL); in utmi_phy_clk_disable() 492 writel_relaxed(val, base + USB_SUSP_CTRL); in utmi_phy_power_on() 502 writel_relaxed(val, base + UTMIP_TX_CFG0); in utmi_phy_power_on() 542 writel_relaxed(val, base + USB_SUSP_CTRL); in utmi_phy_power_on() 618 writel_relaxed(val, base + USB_SUSP_CTRL); in utmi_phy_power_on() 640 writel_relaxed(val, base + USB_USBMODE); in utmi_phy_power_on() 721 writel_relaxed(val, base + UTMIP_TX_CFG0); in utmi_phy_preresume() 731 writel_relaxed(val, base + UTMIP_TX_CFG0); in utmi_phy_postresume() 786 writel_relaxed(val, base + USB_SUSP_CTRL); in ulpi_phy_power_on() [all …]
|
/linux/drivers/mmc/host/ |
A D | mmci_qcom_dml.c | 64 writel_relaxed(config, base + DML_CONFIG); in qcom_dma_start() 70 writel_relaxed(data->blocks * data->blksz, in qcom_dma_start() 75 writel_relaxed(config, base + DML_CONFIG); in qcom_dma_start() 77 writel_relaxed(1, base + DML_PRODUCER_START); in qcom_dma_start() 84 writel_relaxed(config, base + DML_CONFIG); in qcom_dma_start() 88 writel_relaxed(config, base + DML_CONFIG); in qcom_dma_start() 90 writel_relaxed(1, base + DML_CONSUMER_START); in qcom_dma_start() 140 writel_relaxed(1, base + DML_SW_RESET); in qcom_dma_setup() 161 writel_relaxed(config, base + DML_CONFIG); in qcom_dma_setup() 167 writel_relaxed(PRODUCER_PIPE_LOGICAL_SIZE, in qcom_dma_setup() [all …]
|
/linux/arch/arm/mach-qcom/ |
A D | platsmp.c | 71 writel_relaxed(0, base + SCSS_CPU1CORE_RESET); in scss_release_secondary() 171 writel_relaxed(0xA4, saw_reg + APCS_SAW2_VCTL); in kpssv1_release_secondary() 177 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary() 179 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary() 184 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary() 189 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary() 194 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary() 199 writel_relaxed(val, reg + APCS_CPU_PWR_CTL); in kpssv1_release_secondary() 258 writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL); in kpssv2_release_secondary() 265 writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL); in kpssv2_release_secondary() [all …]
|
/linux/arch/arm/common/ |
A D | sa1111.c | 272 writel_relaxed(ie, mapbase + SA1111_INTEN0); in sa1111_unmask_irq() 398 writel_relaxed(0, irqbase + SA1111_INTEN0); in sa1111_setup_irq() 399 writel_relaxed(0, irqbase + SA1111_INTEN1); in sa1111_setup_irq() 400 writel_relaxed(0, irqbase + SA1111_WAKEEN0); in sa1111_setup_irq() 401 writel_relaxed(0, irqbase + SA1111_WAKEEN1); in sa1111_setup_irq() 407 writel_relaxed(0, irqbase + SA1111_INTPOL0); in sa1111_setup_irq() 408 writel_relaxed(BIT(IRQ_S0_READY_NINT & 31) | in sa1111_setup_irq() 452 writel_relaxed(0, irqbase + SA1111_INTEN0); in sa1111_remove_irq() 453 writel_relaxed(0, irqbase + SA1111_INTEN1); in sa1111_remove_irq() 454 writel_relaxed(0, irqbase + SA1111_WAKEEN0); in sa1111_remove_irq() [all …]
|
/linux/drivers/rtc/ |
A D | rtc-st-lpc.c | 59 writel_relaxed(1, rtc->ioaddr + LPC_WDT_OFF); in st_rtc_set_hw_alarm() 61 writel_relaxed(msb, rtc->ioaddr + LPC_LPA_MSB_OFF); in st_rtc_set_hw_alarm() 62 writel_relaxed(lsb, rtc->ioaddr + LPC_LPA_LSB_OFF); in st_rtc_set_hw_alarm() 63 writel_relaxed(1, rtc->ioaddr + LPC_LPA_START_OFF); in st_rtc_set_hw_alarm() 65 writel_relaxed(0, rtc->ioaddr + LPC_WDT_OFF); in st_rtc_set_hw_alarm() 270 writel_relaxed(1, rtc->ioaddr + LPC_WDT_OFF); in st_rtc_suspend() 272 writel_relaxed(0, rtc->ioaddr + LPC_WDT_OFF); in st_rtc_suspend() 289 writel_relaxed(0, rtc->ioaddr + LPC_LPA_MSB_OFF); in st_rtc_resume() 290 writel_relaxed(0, rtc->ioaddr + LPC_LPA_LSB_OFF); in st_rtc_resume() 291 writel_relaxed(1, rtc->ioaddr + LPC_WDT_OFF); in st_rtc_resume() [all …]
|
/linux/drivers/net/ethernet/hisilicon/ |
A D | hix5hd2_gmac.c | 315 writel_relaxed(val, priv->ctrl_base); in hix5hd2_config_port() 325 writel_relaxed(val, priv->base + PORT_MODE); in hix5hd2_config_port() 334 writel_relaxed(0, priv->base + RX_FQ_REG_EN); in hix5hd2_set_desc_depth() 338 writel_relaxed(0, priv->base + RX_BQ_REG_EN); in hix5hd2_set_desc_depth() 342 writel_relaxed(0, priv->base + TX_BQ_REG_EN); in hix5hd2_set_desc_depth() 346 writel_relaxed(0, priv->base + TX_RQ_REG_EN); in hix5hd2_set_desc_depth() 353 writel_relaxed(0, priv->base + RX_FQ_REG_EN); in hix5hd2_set_rx_fq() 360 writel_relaxed(0, priv->base + RX_BQ_REG_EN); in hix5hd2_set_rx_bq() 367 writel_relaxed(0, priv->base + TX_BQ_REG_EN); in hix5hd2_set_tx_bq() 390 writel_relaxed(0, priv->base + ENA_PMU_INT); in hix5hd2_hw_init() [all …]
|