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Searched refs:writeq_relaxed (Results 1 – 25 of 44) sorted by relevance

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/linux/drivers/net/ethernet/cavium/thunder/
A Dthunder_xcv.c72 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
77 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
87 writeq_relaxed(cfg, xcv->reg_base + XCV_DLL_CTL); in xcv_init_hw()
94 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
102 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
106 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_init_hw()
130 writeq_relaxed(cfg, xcv->reg_base + XCV_CTL); in xcv_setup_link()
135 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_setup_link()
140 writeq_relaxed(cfg, xcv->reg_base + XCV_RESET); in xcv_setup_link()
143 writeq_relaxed(0x01, xcv->reg_base + XCV_BATCH_CRD_RET); in xcv_setup_link()
[all …]
A Dnic_main.c90 writeq_relaxed(val, nic->reg_base + offset); in nic_reg_write()
146 writeq_relaxed(msg[0], mbx_addr); in nic_send_msg_to_vf()
147 writeq_relaxed(msg[1], mbx_addr + 8); in nic_send_msg_to_vf()
149 writeq_relaxed(msg[1], mbx_addr + 8); in nic_send_msg_to_vf()
150 writeq_relaxed(msg[0], mbx_addr); in nic_send_msg_to_vf()
/linux/arch/arm64/include/asm/
A Darch_gicv3.h123 #define gic_write_irouter(v, c) writeq_relaxed(v, c)
125 #define gic_write_lpir(v, c) writeq_relaxed(v, c)
131 #define gits_write_baser(v, c) writeq_relaxed(v, c)
134 #define gits_write_cbaser(v, c) writeq_relaxed(v, c)
136 #define gits_write_cwriter(v, c) writeq_relaxed(v, c)
139 #define gicr_write_propbaser(v, c) writeq_relaxed(v, c)
141 #define gicr_write_pendbaser(v, c) writeq_relaxed(v, c)
144 #define gicr_write_vpropbaser(v, c) writeq_relaxed(v, c)
147 #define gicr_write_vpendbaser(v, c) writeq_relaxed(v, c)
A Dio.h128 #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)cpu_to_le64(v),(c))) macro
143 #define writeq(v,c) ({ __iowmb(); writeq_relaxed((v),(c)); })
/linux/include/linux/
A Dio-64-nonatomic-lo-hi.h54 #ifndef writeq_relaxed
55 #define writeq_relaxed lo_hi_writeq_relaxed macro
A Dio-64-nonatomic-hi-lo.h54 #ifndef writeq_relaxed
55 #define writeq_relaxed hi_lo_writeq_relaxed macro
/linux/drivers/perf/
A Darm_smmuv3_pmu.c679 writeq_relaxed(doorbell, pmu->reg_base + SMMU_PMCG_IRQ_CFG0); in smmu_pmu_write_msi_msg()
692 writeq_relaxed(0, pmu->reg_base + SMMU_PMCG_IRQ_CFG0); in smmu_pmu_setup_msi()
733 writeq_relaxed(counter_present_mask, in smmu_pmu_reset()
735 writeq_relaxed(counter_present_mask, in smmu_pmu_reset()
737 writeq_relaxed(counter_present_mask, in smmu_pmu_reset()
A Darm-cmn.c702 writeq_relaxed(CMN_CC_INIT, dtc->base + CMN_DT_PMCCNTR); in arm_cmn_read_cc()
769 writeq_relaxed(CMN_CC_INIT, cmn->dtc[i].base + CMN_DT_PMCCNTR); in arm_cmn_event_start()
777 writeq_relaxed(val, dn->pmu_base + CMN_DTM_WPn_VAL(wp_idx)); in arm_cmn_event_start()
778 writeq_relaxed(mask, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_start()
803 writeq_relaxed(0, dn->pmu_base + CMN_DTM_WPn_MASK(wp_idx)); in arm_cmn_event_stop()
804 writeq_relaxed(~0ULL, dn->pmu_base + CMN_DTM_WPn_VAL(wp_idx)); in arm_cmn_event_stop()
1098 writeq_relaxed(reg, xp->pmu_base + CMN_DTM_PMU_CONFIG); in arm_cmn_event_add()
1240 writeq_relaxed(0, xp->pmu_base + CMN_DTM_WPn_MASK(i)); in arm_cmn_init_dtm()
1241 writeq_relaxed(~0ULL, xp->pmu_base + CMN_DTM_WPn_VAL(i)); in arm_cmn_init_dtm()
/linux/include/asm-generic/
A Dio.h303 #if defined(writeq) && !defined(writeq_relaxed)
304 #define writeq_relaxed writeq_relaxed macro
305 static inline void writeq_relaxed(u64 value, volatile void __iomem *addr) in writeq_relaxed() function
/linux/arch/arm64/kernel/
A Dsmp_spin_table.c92 writeq_relaxed(pa_holding_pen, release_addr); in smp_spin_table_cpu_prepare()
A Dacpi_parking_protocol.c102 writeq_relaxed(__pa_symbol(function_nocfi(secondary_entry)), in acpi_parking_protocol_cpu_boot()
/linux/drivers/mailbox/
A Dapple-mailbox.c123 writeq_relaxed(msg->msg0, apple_mbox->regs + apple_mbox->hw->a2i_send0); in apple_mbox_hw_send()
124 writeq_relaxed(FIELD_PREP(APPLE_MBOX_MSG1_MSG, msg->msg1), in apple_mbox_hw_send()
/linux/arch/sh/include/asm/
A Dio.h47 #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)ioswabq(v),c)) macro
57 #define writeq(v,a) ({ wmb(); writeq_relaxed((v),(a)); })
/linux/drivers/crypto/marvell/octeontx2/
A Dotx2_cpt_common.h112 writeq_relaxed(val, reg_base + in otx2_cpt_write64()
/linux/drivers/clocksource/
A Dtimer-clint.c108 writeq_relaxed(clint_get_cycles64() + delta, r); in clint_clock_next_event()
/linux/drivers/bus/fsl-mc/
A Dmc-sys.c109 writeq_relaxed(le64_to_cpu(cmd->params[i]), &portal->params[i]); in mc_write_command()
/linux/arch/riscv/include/asm/
A Dmmio.h124 #define writeq_relaxed(v, c) ({ __io_rbw(); writeq_cpu((v), (c)); __io_raw(); }) macro
/linux/drivers/hwtracing/intel_th/
A Dsth.c45 writeq_relaxed(*(u64 *)payload, dest); in sth_iowrite()
/linux/arch/parisc/include/asm/
A Dio.h220 #define writeq_relaxed(q, addr) writeq(q, addr) macro
/linux/arch/x86/include/asm/
A Dio.h101 #define writeq_relaxed(v, a) __writeq(v, a) macro
/linux/drivers/iommu/arm/arm-smmu/
A Darm-smmu-nvidia.c93 writeq_relaxed(val, reg); in nvidia_smmu_write_reg64()
/linux/drivers/iommu/arm/arm-smmu-v3/
A Darm-smmu-v3.c3150 writeq_relaxed(doorbell, smmu->base + cfg[0]); in arm_smmu_write_msi_msg()
3162 writeq_relaxed(0, smmu->base + ARM_SMMU_GERROR_IRQ_CFG0); in arm_smmu_setup_msis()
3163 writeq_relaxed(0, smmu->base + ARM_SMMU_EVTQ_IRQ_CFG0); in arm_smmu_setup_msis()
3166 writeq_relaxed(0, smmu->base + ARM_SMMU_PRIQ_IRQ_CFG0); in arm_smmu_setup_msis()
3339 writeq_relaxed(smmu->strtab_cfg.strtab_base, in arm_smmu_device_reset()
3345 writeq_relaxed(smmu->cmdq.q.q_base, smmu->base + ARM_SMMU_CMDQ_BASE); in arm_smmu_device_reset()
3371 writeq_relaxed(smmu->evtq.q.q_base, smmu->base + ARM_SMMU_EVTQ_BASE); in arm_smmu_device_reset()
3385 writeq_relaxed(smmu->priq.q.q_base, in arm_smmu_device_reset()
/linux/drivers/base/regmap/
A Dregmap-mmio.c140 writeq_relaxed(val, ctx->regs + reg); in regmap_mmio_write64le_relaxed()
/linux/arch/sparc/include/asm/
A Dio_64.h186 #define writeq_relaxed writeq macro
/linux/drivers/mmc/host/
A Ddw_mmc.h484 writeq_relaxed((value), (dev)->regs + SDMMC_##reg)

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