Searched refs:wrpll (Results 1 – 5 of 5) sorted by relevance
3 obj-$(CONFIG_CLK_ANALOGBITS_WRPLL_CLN28HPC) += wrpll-cln28hpc.o
614 hw_state->wrpll = val; in hsw_ddi_wrpll_get_hw_state()873 crtc_state->dpll_hw_state.wrpll = val; in hsw_ddi_wrpll_get_dpll()892 u32 wrpll = pll_state->wrpll; in hsw_ddi_wrpll_get_freq() local894 switch (wrpll & WRPLL_REF_MASK) { in hsw_ddi_wrpll_get_freq()914 MISSING_CASE(wrpll); in hsw_ddi_wrpll_get_freq()918 r = wrpll & WRPLL_DIVIDER_REF_MASK; in hsw_ddi_wrpll_get_freq()919 p = (wrpll & WRPLL_DIVIDER_POST_MASK) >> WRPLL_DIVIDER_POST_SHIFT; in hsw_ddi_wrpll_get_freq()920 n = (wrpll & WRPLL_DIVIDER_FB_MASK) >> WRPLL_DIVIDER_FB_SHIFT; in hsw_ddi_wrpll_get_freq()1068 hw_state->wrpll, hw_state->spll); in hsw_dump_hw_state()2417 struct skl_wrpll_params wrpll; member[all …]
193 u32 wrpll; member
1112 seq_printf(m, " wrpll: 0x%08x\n", pll->state.hw_state.wrpll); in i915_shared_dplls_info()
7737 PIPE_CONF_CHECK_X(dpll_hw_state.wrpll); in intel_pipe_config_compare()
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