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Searched refs:CCM_CCGR0 (Results 1 – 5 of 5) sorted by relevance

/optee_os/core/drivers/crypto/caam/hal/imx_6_7/
A Dhal_clk_mx6.c19 reg = io_read32(ccm_base + CCM_CCGR0); in caam_hal_clk_enable()
29 io_write32(ccm_base + CCM_CCGR0, reg); in caam_hal_clk_enable()
/optee_os/core/arch/arm/plat-imx/registers/
A Dimx8m-crm.h10 #define CCM_CCGR0 0x4000 macro
12 #define CCM_CCGRx(idx) (((idx) * CCM_CCGRx_OFFSET) + CCM_CCGR0)
A Dimx7-crm.h32 #define CCM_CCGR0 0x4000 macro
34 #define CCM_CCGRx(idx) (((idx) * CCM_CCGRx_OFFSET) + CCM_CCGR0)
A Dimx6-crm.h34 #define CCM_CCGR0 0x0068 macro
/optee_os/core/drivers/imx/dcp/
A Ddcp.c65 CCM_CCGR0 + sizeof(uint32_t)); in dcp_clk_enable()
74 io_setbits32(ccm_base + CCM_CCGR0, DCP_CLK_ENABLE_MASK); in dcp_clk_enable()
83 io_clrbits32(ccm_base + CCM_CCGR0, DCP_CLK_ENABLE_MASK); in dcp_clk_enable()

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