| /optee_os/core/arch/arm/plat-hikey/ |
| A D | platform_config.h | 21 #define CONSOLE_UART_BASE PL011_UART3_BASE macro
23 #define CONSOLE_UART_BASE PL011_UART2_BASE macro
25 #define CONSOLE_UART_BASE PL011_UART0_BASE macro
35 #define CONSOLE_UART_BASE PL011_UART6_BASE macro
37 #define CONSOLE_UART_BASE PL011_UART5_BASE macro
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| A D | main.c | 25 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
46 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, in console_init()
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| /optee_os/core/arch/arm/plat-mediatek/ |
| A D | platform_config.h | 31 #define CONSOLE_UART_BASE UART0_BASE macro
48 #define CONSOLE_UART_BASE UART0_BASE macro
62 #define CONSOLE_UART_BASE UART0_BASE macro
76 #define CONSOLE_UART_BASE UART0_BASE macro
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| A D | main.c | 16 CONSOLE_UART_BASE, SERIAL8250_UART_REG_SIZE);
55 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in console_init()
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| /optee_os/core/arch/arm/plat-vexpress/ |
| A D | platform_config.h | 26 #define CONSOLE_UART_BASE UART1_BASE macro
51 #define CONSOLE_UART_BASE UART3_BASE macro
65 #define CONSOLE_UART_BASE UART1_BASE macro
76 #define CONSOLE_UART_BASE UART1_BASE macro
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| /optee_os/core/arch/arm/plat-marvell/ |
| A D | main.c | 63 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE,
106 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in console_init()
109 mvebu_uart_init(&console_data, CONSOLE_UART_BASE, in console_init()
112 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, in console_init()
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| A D | platform_config.h | 67 #define CONSOLE_UART_BASE PLAT_MARVELL_BOOT_UART_BASE macro
110 #define CONSOLE_UART_BASE PLAT_MARVELL_BOOT_UART_BASE macro
128 #define CONSOLE_UART_BASE PLAT_MARVELL_BOOT_UART_BASE macro
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| /optee_os/core/arch/arm/plat-imx/ |
| A D | main.c | 51 #ifdef CONSOLE_UART_BASE
52 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
112 #ifdef CONSOLE_UART_BASE in console_init()
113 imx_uart_init(&console_data, CONSOLE_UART_BASE); in console_init()
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| /optee_os/core/arch/arm/plat-ti/ |
| A D | platform_config.h | 29 #define CONSOLE_UART_BASE UART1_BASE macro
31 #define CONSOLE_UART_BASE UART3_BASE macro
66 #define CONSOLE_UART_BASE UART0_BASE macro
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| /optee_os/core/arch/arm/plat-amlogic/ |
| A D | main.c | 13 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE,
18 amlogic_uart_init(&console_data, CONSOLE_UART_BASE); in console_init()
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| /optee_os/core/arch/arm/plat-d02/ |
| A D | main.c | 16 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
21 hi16xx_uart_init(&console_data, CONSOLE_UART_BASE, in console_init()
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| /optee_os/core/arch/arm/plat-rpi3/ |
| A D | main.c | 38 CONSOLE_UART_BASE, SERIAL8250_UART_REG_SIZE);
44 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in console_init()
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| /optee_os/core/arch/arm/plat-poplar/ |
| A D | main.c | 19 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
25 pl011_init(&console_data, CONSOLE_UART_BASE, in console_init()
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| /optee_os/core/arch/arm/plat-hisilicon/ |
| A D | main.c | 16 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
29 pl011_init(&console_data, CONSOLE_UART_BASE, in console_init()
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| /optee_os/core/arch/arm/plat-rzg/ |
| A D | main.c | 14 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, SCIF_REG_SIZE);
33 scif_uart_init(&console_data, CONSOLE_UART_BASE); in console_init()
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| /optee_os/core/arch/arm/plat-sunxi/ |
| A D | main.c | 51 #ifdef CONSOLE_UART_BASE
53 CONSOLE_UART_BASE, SUNXI_UART_REG_SIZE);
97 CONSOLE_UART_BASE, in console_init()
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| /optee_os/core/arch/arm/plat-totalcompute/ |
| A D | main.c | 24 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
62 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, in console_init()
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| /optee_os/core/arch/arm/plat-ls/ |
| A D | main.c | 60 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
120 pl011_init(&console_data, CONSOLE_UART_BASE, 0, 0); in console_init()
122 ns16550_init(&console_data, CONSOLE_UART_BASE, IO_WIDTH_U8, 0); in console_init()
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| /optee_os/core/arch/arm/plat-k3/ |
| A D | main.c | 25 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
57 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in console_init()
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| /optee_os/core/arch/arm/plat-rcar/ |
| A D | main.c | 39 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CONSOLE_UART_BASE, SCIF_REG_SIZE);
64 scif_uart_init(&console_data, CONSOLE_UART_BASE); in console_init()
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| /optee_os/core/arch/arm/plat-zynqmp/ |
| A D | platform_config.h | 63 #define CONSOLE_UART_BASE UART0_BASE macro
81 #define CONSOLE_UART_BASE UART1_BASE macro
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| A D | main.c | 54 ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_PGDIR_SIZE),
99 cdns_uart_init(&console_data, CONSOLE_UART_BASE, in console_init()
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| /optee_os/core/arch/arm/plat-uniphier/ |
| A D | main.c | 18 ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_PGDIR_SIZE),
61 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in console_init()
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| /optee_os/core/arch/arm/plat-synquacer/ |
| A D | main.c | 25 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
38 pl011_init(&console_data, CONSOLE_UART_BASE, CONSOLE_UART_CLK_IN_HZ, in console_init()
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| /optee_os/core/arch/arm/plat-aspeed/ |
| A D | platform_ast2600.c | 47 CONSOLE_UART_BASE,
100 serial8250_uart_init(&console_data, CONSOLE_UART_BASE, in console_init()
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