Searched refs:CSU_BASE (Results 1 – 11 of 11) sorted by relevance
| /optee_os/core/include/drivers/ |
| A D | zynqmp_csu.h | 27 #define ZYNQMP_CSU_AES_BASE (CSU_BASE + 0x1000)
31 #define ZYNQMP_CSU_SHA_BASE (CSU_BASE + 0x2000)
35 #define ZYNQMP_CSU_PCAP_BASE (CSU_BASE + 0x3000)
39 #define ZYNQMP_CSU_PUF_BASE (CSU_BASE + 0x4000)
43 #define ZYNQMP_CSU_TAMPER_BASE (CSU_BASE + 0x5000)
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| /optee_os/core/arch/arm/plat-ls/ |
| A D | main.c | 93 for (addr = CSU_BASE + CSU_CSL_START; in plat_primary_init_early()
94 addr != CSU_BASE + CSU_CSL_END; in plat_primary_init_early()
99 io_write32(CSU_BASE + CSU_CSL30, in plat_primary_init_early()
101 io_write32(CSU_BASE + CSU_CSL37, in plat_primary_init_early()
105 for (addr = CSU_BASE + CSU_CSL_START; in plat_primary_init_early()
106 addr != CSU_BASE + CSU_CSL_END; in plat_primary_init_early()
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| A D | platform_config.h | 48 #define CSU_BASE 0x01510000 macro
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| /optee_os/core/drivers/ |
| A D | zynqmp_csu_puf.c | 33 vaddr_t csu = core_mmu_get_va(CSU_BASE, MEM_AREA_IO_SEC, CSU_SIZE); in zynqmp_csu_puf_regenerate()
63 vaddr_t csu = core_mmu_get_va(CSU_BASE, MEM_AREA_IO_SEC, CSU_SIZE); in zynqmp_csu_puf_init()
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| A D | zynqmp_huk.c | 25 vaddr_t csu = core_mmu_get_va(CSU_BASE, MEM_AREA_IO_SEC, CSU_SIZE); in tee_otp_get_hw_unique_key()
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| A D | zynqmp_csu_aes.c | 211 vaddr_t csu = core_mmu_get_va(CSU_BASE, MEM_AREA_IO_SEC, CSU_SIZE); in aes_prepare_op()
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| /optee_os/core/arch/arm/plat-zynqmp/ |
| A D | main.c | 65 register_phys_mem_pgdir(MEM_AREA_IO_SEC, CSU_BASE, CSU_SIZE);
107 vaddr_t csu = core_mmu_get_va(CSU_BASE, MEM_AREA_IO_SEC, CSU_SIZE); in plat_rpmb_key_is_ready()
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| A D | platform_config.h | 94 #define CSU_BASE 0xFFCA0000 macro
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| /optee_os/core/arch/arm/plat-imx/registers/ |
| A D | imx7.h | 41 #define CSU_BASE 0x303E0000 macro
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| A D | imx6.h | 50 #define CSU_BASE 0x021C0000 macro
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| /optee_os/core/arch/arm/plat-imx/drivers/ |
| A D | imx_csu.c | 106 csu_base = core_mmu_get_va(CSU_BASE, MEM_AREA_IO_SEC, 1); in csu_init()
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