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Searched refs:CSU_CSL_END (Results 1 – 5 of 5) sorted by relevance

/optee_os/core/arch/arm/plat-imx/drivers/
A Dimx_csu.c126 for (offset = CSU_CSL_START; offset < CSU_CSL_END; offset += 4) in csu_init()
142 for (offset = CSU_CSL_START; offset < CSU_CSL_END; offset += 4) { in csu_init()
/optee_os/core/arch/arm/plat-ls/
A Dmain.c94 addr != CSU_BASE + CSU_CSL_END; in plat_primary_init_early()
106 addr != CSU_BASE + CSU_CSL_END; in plat_primary_init_early()
A Dplatform_config.h50 #define CSU_CSL_END 0xE8 macro
/optee_os/core/arch/arm/plat-imx/registers/
A Dimx7.h50 #define CSU_CSL_END 0x100 macro
A Dimx6.h103 #define CSU_CSL_END 0xA0 macro

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