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Searched refs:DCFG_CCSR_BRR (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/arch/arm/plat-ls/
A Dplatform_config.h45 #define DCFG_CCSR_BRR 0xE4 macro
A Dmain.c84 io_write32(DCFG_BASE + DCFG_CCSR_BRR /* cpu1 */, in plat_primary_init_early()

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