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Searched refs:DRAM0_SIZE (Results 1 – 16 of 16) sorted by relevance

/optee_os/core/arch/arm/plat-poplar/
A Dplatform_config.h101 #define DRAM0_SIZE 0x80000000 macro
103 #define DRAM0_SIZE 0x40000000 macro
109 #define DRAM0_SIZE_NSEC (DRAM0_SIZE - DRAM0_BASE_NSEC)
/optee_os/core/arch/arm/plat-vexpress/
A Dplatform_config.h89 #define DRAM0_SIZE 0x7f000000 macro
106 #define DRAM0_SIZE 0x7F000000 macro
A Dmain.c40 register_ddr(DRAM0_BASE, DRAM0_SIZE);
/optee_os/core/arch/arm/plat-rpi3/
A Dplatform_config.h69 #define DRAM0_SIZE 0x40000000 macro
/optee_os/core/arch/arm/plat-d02/
A Dplatform_config.h68 #define DRAM0_SIZE 0x50000000 macro
/optee_os/core/arch/arm/plat-synquacer/
A Dplatform_config.h30 #define DRAM0_SIZE 0x80000000 macro
/optee_os/core/arch/arm/plat-uniphier/
A Dplatform_config.h50 #define DRAM0_SIZE (CFG_DRAM0_SIZE - CFG_DRAM0_RSV_SIZE) macro
A Dmain.c30 register_ddr(DRAM0_BASE, DRAM0_SIZE);
/optee_os/core/arch/arm/plat-totalcompute/
A Dplatform_config.h27 #define DRAM0_SIZE 0x7d000000 macro
A Dmain.c29 register_ddr(DRAM0_BASE, DRAM0_SIZE);
/optee_os/core/arch/arm/plat-sprd/
A Dplatform_config.h52 #define DRAM0_SIZE 0x20000000 macro
/optee_os/core/arch/arm/plat-mediatek/
A Dplatform_config.h36 #define DRAM0_SIZE 0x80000000 macro
/optee_os/core/arch/arm/plat-hikey/
A Dplatform_config.h108 #define DRAM0_SIZE 0x3F000000 macro
/optee_os/core/arch/arm/plat-ti/
A Dplatform_config.h10 #define DRAM0_SIZE 0x80000000 macro
/optee_os/core/arch/arm/plat-stm/
A Dplatform_config.h203 #define DRAM0_SIZE (STM_SECDDR_BASE - DRAM0_BASE) macro
A Dmain.c30 register_ddr(DRAM0_BASE, DRAM0_SIZE);

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