Searched refs:DRAM1_BASE (Results 1 – 12 of 12) sorted by relevance
32 #ifdef DRAM1_BASE33 register_ddr(DRAM1_BASE, DRAM1_SIZE);
91 #define DRAM1_BASE 0x880000000UL macro108 #define DRAM1_BASE 0x880000000UL macro
42 #ifdef DRAM1_BASE43 register_ddr(DRAM1_BASE, DRAM1_SIZE);
205 #define DRAM1_BASE STM_SECDDR_END macro206 #define DRAM1_SIZE ((CFG_DDR_START - DRAM1_BASE) + CFG_DDR_SIZE)
70 #define DRAM1_BASE 0x51800000 macro
29 #define DRAM1_BASE 0x8080000000ULL macro
30 register_ddr(DRAM1_BASE, DRAM1_SIZE);
47 #define DRAM1_BASE 0x800000000 macro
75 register_ddr(DRAM1_BASE, CFG_DDR_SIZE - 0x80000000);
110 #define DRAM1_BASE 0x40000000 macro
38 register_dynamic_shm(DRAM1_BASE, DRAM1_SIZE_NSEC);
Completed in 10 milliseconds