/optee_os/core/arch/arm/plat-ls/ |
A D | platform_config.h | 60 #define GICC_OFFSET 0x2000 macro 69 #define GICC_OFFSET 0x2000 macro 78 #define GICC_OFFSET 0x20000 macro 87 #define GICC_OFFSET 0x0 macro 96 #define GICC_OFFSET 0x0 macro 105 #define GICC_OFFSET 0x0 macro 114 #define GICC_OFFSET 0x0 macro 123 #define GICC_OFFSET 0x0 macro
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/optee_os/core/arch/arm/plat-vexpress/ |
A D | platform_config.h | 97 #define GICC_OFFSET 0x0 macro 111 #define GICC_OFFSET 0x1f000 macro 123 #define GICC_OFFSET 0x10000 macro 128 #define GICC_OFFSET 0x10000 macro 136 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
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/optee_os/core/arch/arm/plat-mediatek/ |
A D | platform_config.h | 23 #define GICC_OFFSET 0x2000 macro 41 #define GICC_OFFSET 0x400000 macro 55 #define GICC_OFFSET 0x10000 macro 69 #define GICC_OFFSET 0x400000 macro
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A D | main.c | 27 register_phys_mem_pgdir(MEM_AREA_IO_SEC, GIC_BASE + GICC_OFFSET, 35 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
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/optee_os/core/arch/arm/plat-marvell/ |
A D | platform_config.h | 69 #define GICC_OFFSET 0x10000 macro 73 #define GICC_BASE (GIC_BASE + GICC_OFFSET) 99 #define GICC_OFFSET (0x80000) macro 104 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
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A D | main.c | 82 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
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/optee_os/core/arch/arm/plat-k3/ |
A D | platform_config.h | 20 #define GICC_OFFSET 0x100000 macro 25 #define GICC_OFFSET 0x80000 macro 30 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
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/optee_os/core/arch/arm/plat-ti/ |
A D | platform_config.h | 40 #define GICC_OFFSET 0x2000 macro 44 #define GICC_BASE (SCU_BASE + GICC_OFFSET) 73 #define GICC_OFFSET 0x0100 macro 78 #define GICC_BASE (SCU_BASE + GICC_OFFSET)
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/optee_os/core/arch/arm/plat-imx/registers/ |
A D | imx6.h | 88 #define GICC_OFFSET 0x2000 macro 94 #define GICC_OFFSET 0x100 macro 98 #define GIC_CPU_BASE (GIC_BASE + GICC_OFFSET)
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A D | imx7ulp.h | 13 #define GICC_OFFSET 0x2000 macro
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A D | imx7.h | 12 #define GICC_OFFSET 0x2000 macro
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/optee_os/core/arch/arm/plat-rzn1/ |
A D | platform_config.h | 19 #define GICC_OFFSET 0x2000 macro 21 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
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/optee_os/core/arch/arm/plat-totalcompute/ |
A D | platform_config.h | 18 #define GICC_OFFSET 0x0 macro 41 #define GICC_BASE (GIC_BASE + GICC_OFFSET)
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A D | main.c | 37 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
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/optee_os/core/arch/arm/plat-zynqmp/ |
A D | platform_config.h | 68 #define GICC_OFFSET 0x20000 macro 86 #define GICC_OFFSET 0x20000 macro
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A D | main.c | 84 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
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/optee_os/core/arch/arm/plat-zynq7k/ |
A D | platform_config.h | 39 #define GICC_OFFSET 0x100 macro 41 #define GIC_CPU_BASE (GIC_BASE + GICC_OFFSET)
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/optee_os/core/arch/arm/plat-aspeed/ |
A D | platform_ast2600.c | 55 GIC_BASE + GICC_OFFSET, 77 gicc_base = core_mmu_get_va(GIC_BASE + GICC_OFFSET, in main_init_gic()
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A D | platform_config.h | 16 #define GICC_OFFSET 0x2000 macro
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/optee_os/core/arch/arm/plat-amlogic/ |
A D | platform_config.h | 15 #define GICC_OFFSET 0x2000 macro
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/optee_os/core/arch/arm/plat-sunxi/ |
A D | platform_config.h | 47 #define GICC_OFFSET 0x2000 macro
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/optee_os/core/arch/arm/plat-uniphier/ |
A D | platform_config.h | 18 #define GICC_OFFSET 0x80000 macro
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A D | main.c | 44 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
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/optee_os/core/arch/arm/plat-sprd/ |
A D | platform_config.h | 60 #define GICC_OFFSET 0x2000 macro
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A D | main.c | 56 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, in main_init_gic()
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