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Searched refs:GIC_CPU_BASE (Results 1 – 5 of 5) sorted by relevance

/optee_os/core/arch/arm/plat-marvell/
A Dplatform_config.h58 #define GIC_CPU_BASE (MVEBU_REGS_BASE + MVEBU_GICC_BASE) macro
96 #define GIC_CPU_BASE (MVEBU_REGS_BASE + MVEBU_GICC_BASE) macro
/optee_os/core/arch/arm/plat-zynq7k/
A Dplatform_config.h41 #define GIC_CPU_BASE (GIC_BASE + GICC_OFFSET) macro
/optee_os/core/arch/arm/plat-stm/
A Dplatform_config.h49 #define GIC_CPU_BASE (CPU_IOMEM_BASE + 0x0100) macro
A Dmain.c141 gicc_base = (vaddr_t)phys_to_virt(GIC_CPU_BASE, MEM_AREA_IO_SEC, 1); in main_init_gic()
/optee_os/core/arch/arm/plat-imx/registers/
A Dimx6.h98 #define GIC_CPU_BASE (GIC_BASE + GICC_OFFSET) macro

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