| /optee_os/core/arch/arm/plat-hikey/ |
| A D | main.c | 25 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
27 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, PMUSSI_BASE, PMUSSI_REG_SIZE);
30 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, PERI_BASE, PERI_BASE_REG_SIZE);
31 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, PMX0_BASE, PMX0_REG_SIZE);
32 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, PMX1_BASE, PMX1_REG_SIZE);
33 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, GPIO6_BASE, PL061_REG_SIZE);
34 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, SPI_BASE, PL022_REG_SIZE);
56 vaddr_t peri_base = core_mmu_get_va(PERI_BASE, MEM_AREA_IO_NSEC, in spi_init()
58 vaddr_t pmx0_base = core_mmu_get_va(PMX0_BASE, MEM_AREA_IO_NSEC, in spi_init()
60 vaddr_t pmx1_base = core_mmu_get_va(PMX1_BASE, MEM_AREA_IO_NSEC, in spi_init()
[all …]
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| A D | spi_test.c | 23 vaddr_t gpio6_base = core_mmu_get_va(GPIO6_BASE, MEM_AREA_IO_NSEC, in spi_cs_callback()
25 vaddr_t spi_base = core_mmu_get_va(SPI_BASE, MEM_AREA_IO_NSEC, in spi_cs_callback()
50 vaddr_t pmx0_base = core_mmu_get_va(PMX0_BASE, MEM_AREA_IO_NSEC, in spi_set_cs_mux()
71 vaddr_t spi_base = core_mmu_get_va(SPI_BASE, MEM_AREA_IO_NSEC, in spi_test_with_manual_cs_control()
160 vaddr_t spi_base = core_mmu_get_va(SPI_BASE, MEM_AREA_IO_NSEC, in spi_test_with_registered_cs_cb()
207 vaddr_t gpio6_base = core_mmu_get_va(GPIO6_BASE, MEM_AREA_IO_NSEC, in spi_test_with_builtin_cs_control()
209 vaddr_t spi_base = core_mmu_get_va(SPI_BASE, MEM_AREA_IO_NSEC, in spi_test_with_builtin_cs_control()
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| /optee_os/core/arch/arm/plat-stm32mp1/ |
| A D | main.c | 27 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, APB1_BASE, APB1_SIZE);
28 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, APB2_BASE, APB2_SIZE);
29 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, APB3_BASE, APB3_SIZE);
30 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, APB4_BASE, APB4_SIZE);
31 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, APB5_BASE, APB5_SIZE);
32 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, AHB4_BASE, AHB4_SIZE);
33 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, AHB5_BASE, AHB5_SIZE);
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| /optee_os/core/arch/arm/plat-bcm/ |
| A D | main.c | 37 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, BCM_DEVICE5_BASE, BCM_DEVICE5_SIZE);
52 register_phys_mem(MEM_AREA_IO_NSEC, CFG_BCM_ELOG_AP_UART_LOG_BASE,
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| /optee_os/core/drivers/bnxt/ |
| A D | bnxt_images.c | 101 phys_to_virt(QSPI_BNXT_IMG, MEM_AREA_IO_NSEC, in get_bnxt_images_info()
112 MEM_AREA_IO_NSEC, in get_bnxt_images_info()
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| /optee_os/core/arch/arm/plat-d02/ |
| A D | main.c | 16 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
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| /optee_os/core/arch/arm/plat-rpi3/ |
| A D | main.c | 37 register_phys_mem_pgdir(MEM_AREA_IO_NSEC,
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| /optee_os/core/arch/arm/plat-poplar/ |
| A D | main.c | 19 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
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| /optee_os/core/arch/arm/plat-hisilicon/ |
| A D | main.c | 16 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
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| /optee_os/core/arch/arm/plat-sprd/ |
| A D | main.c | 37 register_phys_mem_pgdir(MEM_AREA_IO_NSEC,
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| /optee_os/core/arch/arm/plat-rockchip/ |
| A D | main.c | 21 register_phys_mem_pgdir(MEM_AREA_IO_NSEC,
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| /optee_os/core/arch/arm/plat-k3/ |
| A D | main.c | 25 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
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| /optee_os/core/arch/arm/plat-mediatek/ |
| A D | main.c | 15 register_phys_mem_pgdir(MEM_AREA_IO_NSEC,
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| /optee_os/core/arch/arm/plat-synquacer/ |
| A D | main.c | 25 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
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| /optee_os/core/arch/arm/plat-aspeed/ |
| A D | platform_ast2600.c | 46 register_phys_mem(MEM_AREA_IO_NSEC,
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| /optee_os/core/arch/arm/plat-imx/ |
| A D | main.c | 52 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
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| /optee_os/core/arch/arm/plat-stm/ |
| A D | main.c | 27 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, UART_CONSOLE_BASE, STIH_ASC_REG_SIZE);
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| /optee_os/core/arch/arm/plat-sunxi/ |
| A D | main.c | 52 register_phys_mem_pgdir(MEM_AREA_IO_NSEC,
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| /optee_os/core/arch/arm/plat-ls/ |
| A D | main.c | 60 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
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| /optee_os/core/arch/arm/include/mm/ |
| A D | core_mmu.h | 146 MEM_AREA_IO_NSEC, enumerator
178 [MEM_AREA_IO_NSEC] = "IO_NSEC", in teecore_memtype_name()
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| /optee_os/core/arch/arm/plat-ti/ |
| A D | main.c | 36 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
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| /optee_os/core/arch/arm/plat-zynq7k/ |
| A D | main.c | 50 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE,
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| /optee_os/core/drivers/ |
| A D | stm32_uart.c | 169 MEM_AREA_IO_NSEC, info.reg_size); in stm32_uart_init_from_dt_node()
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| A D | stm32_rng.c | 228 mtype = MEM_AREA_IO_NSEC; in stm32_rng_init()
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| /optee_os/core/kernel/ |
| A D | dt.c | 113 mtype = MEM_AREA_IO_NSEC; in dt_map_dev()
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