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Searched refs:NSEC_DDR_3_BASE (Results 1 – 3 of 3) sorted by relevance

/optee_os/core/arch/arm/plat-rzg/
A Dmain.c25 #ifdef NSEC_DDR_3_BASE
26 register_dynamic_shm(NSEC_DDR_3_BASE, NSEC_DDR_3_SIZE);
/optee_os/core/arch/arm/plat-rcar/
A Dplatform_config.h54 #define NSEC_DDR_3_BASE 0x700000000U macro
64 #define NSEC_DDR_3_BASE 0x700000000U macro
A Dmain.c54 #ifdef NSEC_DDR_3_BASE
55 register_ddr(NSEC_DDR_3_BASE, NSEC_DDR_3_SIZE);

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