Searched refs:PLL1_P (Results 1 – 3 of 3) sorted by relevance
/optee_os/core/arch/arm/plat-stm32mp1/ |
A D | shared_resources.c | 485 (PLL1_P + 1) == PLL1_Q && in stm32mp_nsec_can_access_clock() 486 (PLL1_P + 2) == PLL1_R && in stm32mp_nsec_can_access_clock() 487 (PLL1_P + 3) == PLL2_P && in stm32mp_nsec_can_access_clock() 488 (PLL1_P + 4) == PLL2_Q && in stm32mp_nsec_can_access_clock() 489 (PLL1_P + 5) == PLL2_R && in stm32mp_nsec_can_access_clock() 490 (PLL1_P + 6) == PLL3_P && in stm32mp_nsec_can_access_clock() 491 (PLL1_P + 7) == PLL3_Q && in stm32mp_nsec_can_access_clock() 492 (PLL1_P + 8) == PLL3_R); in stm32mp_nsec_can_access_clock() 495 (clock_id >= PLL1_P && clock_id <= PLL3_R)) in stm32mp_nsec_can_access_clock()
|
/optee_os/core/include/dt-bindings/clock/ |
A D | stm32mp1-clks.h | 189 #define PLL1_P 180 macro
|
/optee_os/core/drivers/clk/ |
A D | clk-stm32mp15.c | 118 [_PLL1_P] = PLL1_P, 414 PLL1_P, PLL1_Q, PLL1_R, PLL2_P, PLL2_Q, PLL2_R, PLL3_P, PLL3_Q, PLL3_R,
|
Completed in 7 milliseconds