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Searched refs:RCC_AHB5RSTSETR (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/arch/arm/plat-stm32mp1/
A Drng_seed.c35 io_setbits32(rcc + RCC_AHB5RSTSETR, RCC_AHB5RSTSETR_RNG1RST); in plat_rng_init()
36 while (!(io_read32(rcc + RCC_AHB5RSTSETR) & RCC_AHB5RSTSETR_RNG1RST)) in plat_rng_init()
40 while (io_read32(rcc + RCC_AHB5RSTSETR) & RCC_AHB5RSTSETR_RNG1RST) in plat_rng_init()
/optee_os/core/include/drivers/
A Dstm32mp1_rcc.h56 #define RCC_AHB5RSTSETR 0x190 macro

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