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Searched refs:SLCR_TZ_DDR_RAM (Results 1 – 2 of 2) sorted by relevance

/optee_os/core/arch/arm/plat-zynq7k/
A Dplatform_config.h47 #define SLCR_TZ_DDR_RAM 0xF8000430 macro
A Dmain.c82 io_write32(SLCR_TZ_DDR_RAM, ACCESS_BITS_ALL); in plat_primary_init_early()

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