/optee_os/core/arch/arm/plat-marvell/ |
A D | conf.mk | 5 $(call force,CFG_TEE_CORE_NB_CORE,4) 14 $(call force,CFG_8250_UART,y) 28 $(call force,CFG_MVEBU_UART,y) 29 $(call force,CFG_ARM_GICV3,y) 43 $(call force,CFG_PL011,y) 44 $(call force,CFG_ARM_GICV3,y) 62 $(call force,CFG_PL011,y) 63 $(call force,CFG_ARM_GICV3,y) 81 $(call force,CFG_PL011,y) 82 $(call force,CFG_ARM_GICV3,y) [all …]
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/optee_os/core/arch/arm/plat-ls/ |
A D | crypto_conf.mk | 47 $(call force,CFG_JR_INT,105) 50 $(call force,CFG_JR_INT,105) 53 $(call force,CFG_JR_INT,137) 56 $(call force,CFG_JR_INT,137) 59 $(call force,CFG_JR_INT,105) 62 $(call force,CFG_JR_INT,137) 65 $(call force,CFG_JR_INT,175) 69 $(call force,CFG_JR_INT,175) 73 $(call force,CFG_JR_INT,175) 138 $(call force, CFG_NXP_CAAM_ACIPHER_DRV, $(call cryphw-one-enabled, RSA ECC DH DSA)) [all …]
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A D | conf.mk | 4 $(call force,CFG_GIC,y) 5 $(call force,CFG_16550_UART,y) 6 $(call force,CFG_LS,y) 69 $(call force,CFG_ARM_GICV3,y) 78 $(call force,CFG_ARM_GICV3,y) 89 $(call force,CFG_ARM_GICV3,y) 90 $(call force,CFG_PL011,y) 92 $(call force,CFG_EMBED_DTB,y) 108 $(call force,CFG_ARM_GICV3,y) 109 $(call force,CFG_PL011,y) [all …]
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/optee_os/core/arch/arm/plat-imx/ |
A D | crypto_conf.mk | 42 $(call force,CFG_JR_INDEX,3) 43 $(call force,CFG_JR_INT,486) 47 $(call force,CFG_JR_INDEX,2) 48 $(call force,CFG_JR_INT,146) 52 $(call force,CFG_JR_INDEX,2) 53 $(call force,CFG_JR_INT,114) 54 $(call force,CFG_CAAM_NO_ITR,y) 58 $(call force, CFG_JR_INDEX,0) 59 $(call force, CFG_JR_INT,137) 118 $(call force, CFG_NXP_CAAM_ACIPHER_DRV, $(call cryphw-one-enabled, RSA ECC DH DSA)) [all …]
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A D | conf.mk | 89 $(call force,CFG_MX6,y) 95 $(call force,CFG_MX6,y) 104 $(call force,CFG_MX6,y) 105 $(call force,CFG_MX6Q,y) 109 $(call force,CFG_MX6,y) 113 $(call force,CFG_MX6,y) 118 $(call force,CFG_MX6,y) 123 $(call force,CFG_MX6,y) 127 $(call force,CFG_MX6,y) 134 $(call force,CFG_MX6,y) [all …]
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/optee_os/core/kernel/ |
A D | initcall.c | 17 const struct initcall *call = NULL; in call_preinitcalls() local 20 for (call = preinitcall_begin; call < preinitcall_end; call++) { in call_preinitcalls() 21 DMSG("level %d %s()", call->level, call->func_name); in call_preinitcalls() 22 ret = call->func(); in call_preinitcalls() 36 const struct initcall *call = NULL; in call_initcalls() local 39 for (call = initcall_begin; call < initcall_end; call++) { in call_initcalls() 40 DMSG("level %d %s()", call->level, call->func_name); in call_initcalls() 41 ret = call->func(); in call_initcalls() 58 for (call = finalcall_begin; call < finalcall_end; call++) { in call_finalcalls() 59 DMSG("level %d %s()", call->level, call->func_name); in call_finalcalls() [all …]
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/optee_os/core/arch/arm/plat-stm32mp1/ |
A D | conf.mk | 29 $(call force,CFG_STM32_CRYP,n) 35 $(call force,CFG_DRIVERS_CLK,y) 37 $(call force,CFG_GIC,y) 39 $(call force,CFG_PSCI_ARM32,y) 70 $(call force,CFG_STM32_CRYP,n) 71 $(call force,CFG_STM32_GPIO,n) 72 $(call force,CFG_STM32_I2C,n) 73 $(call force,CFG_STPMIC1,n) 75 $(call force,CFG_SCMI_PTA,n) 92 $(call force,CFG_STM32_I2C,y) [all …]
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/optee_os/core/ |
A D | crypto.mk | 116 $(eval $(call cryp-dep-one, ECB, AES DES)) 117 $(eval $(call cryp-dep-one, CBC, AES DES)) 118 $(eval $(call cryp-dep-one, CTR, AES)) 121 $(eval $(call cryp-dep-one, XTS, AES)) 124 $(eval $(call cryp-dep-one, CMAC, AES)) 126 $(eval $(call cryp-dep-one, CCM, AES)) 127 $(eval $(call cryp-dep-one, GCM, AES)) 131 $(eval $(call cryp-dep-one, DES, ECB CBC)) 133 $(eval $(call cryp-dep-one, SM2_PKE, ECC)) 134 $(eval $(call cryp-dep-one, SM2_DSA, ECC)) [all …]
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/optee_os/core/arch/arm/plat-mediatek/ |
A D | conf.mk | 7 $(call force,CFG_8250_UART,y) 9 $(call force,CFG_WITH_ARM_TRUSTED_FW,y) 12 $(call force,CFG_WITH_LPAE,y) 14 $(call force,CFG_ARM32_core,y) 25 $(call force,CFG_TEE_CORE_NB_CORE,4) 34 $(call force,CFG_TEE_CORE_NB_CORE,4) 36 $(call force,CFG_ARM_GICV3,y) 37 $(call force,CFG_GIC,y) 45 $(call force,CFG_TEE_CORE_NB_CORE,4) 56 $(call force,CFG_ARM_GICV3,y) [all …]
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/optee_os/core/arch/arm/plat-sam/ |
A D | conf.mk | 18 $(call force,CFG_TEE_CORE_NB_CORE,1) 19 $(call force,CFG_ATMEL_UART,y) 21 $(call force,CFG_NO_SMP,y) 22 $(call force,CFG_PL310,y) 23 $(call force,CFG_PL310_LOCKED,y) 24 $(call force,CFG_AT91_MATRIX,y) 25 $(call force,CFG_DRIVERS_CLK,y) 26 $(call force,CFG_DRIVERS_CLK_DT,y) 27 $(call force,CFG_DRIVERS_CLK_FIXED,y) 28 $(call force,CFG_DRIVERS_SAM_CLK,y) [all …]
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/optee_os/core/arch/arm/plat-bcm/ |
A D | conf.mk | 5 $(call force,CFG_8250_UART,y) 6 $(call force,CFG_TEE_CORE_DEBUG,n) 7 $(call force,CFG_GIC,y) 9 $(call force,CFG_WITH_LPAE,y) 10 $(call force,CFG_ARM_GICV3,y) 12 $(call force,CFG_TEE_CORE_NB_CORE,8) 23 $(call force,CFG_PL022,y) 24 $(call force,CFG_SP805_WDT,y) 25 $(call force,CFG_BCM_HWRNG,y) 26 $(call force,CFG_BCM_SOTP,y) [all …]
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/optee_os/core/arch/arm/plat-ti/ |
A D | conf.mk | 15 $(call force,CFG_TEE_CORE_NB_CORE,2) 22 $(call force,CFG_TEE_CORE_NB_CORE,2) 29 $(call force, CFG_TEE_CORE_NB_CORE,1) 31 $(call force,CFG_NO_SMP,y) 32 $(call force,CFG_PL310,y) 33 $(call force,CFG_PL310_LOCKED,y) 34 $(call force,CFG_PM_ARM32,y) 38 $(call force,CFG_8250_UART,y) 39 $(call force,CFG_ARM32_core,y) 41 $(call force,CFG_GIC,y) [all …]
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/optee_os/mk/ |
A D | config.mk | 45 $(call force,CFG_CC_OPT_LEVEL,0) 46 $(call force,CFG_DEBUG_INFO,y) 343 $(call force,CFG_EARLY_TA,y) 349 $(call force,CFG_EMBEDDED_TS,y) 353 $(call force,CFG_EMBEDDED_TS,y) 359 $(call force,CFG_EMBEDDED_TS,y) 363 $(call force,CFG_ZLIB,y) 432 $(call force,CFG_DT,y) 617 $(call force,CFG_TA_MBEDTLS,y) 682 $(call force,CFG_WITH_STMM_SP,y) [all …]
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/optee_os/core/arch/arm/plat-rzg/ |
A D | conf.mk | 6 $(call force,CFG_WITH_ARM_TRUSTED_FW,y) 7 $(call force,CFG_SCIF,y) 8 $(call force,CFG_CORE_LARGE_PHYS_ADDR,y) 9 $(call force,CFG_CORE_ARM64_PA_BITS,36) 17 $(call force,CFG_CORE_ASLR,n) 20 $(call force,CFG_TEE_CORE_NB_CORE,2) 23 $(call force,CFG_TEE_CORE_NB_CORE,6) 30 $(call force,CFG_TEE_CORE_NB_CORE,2) 33 $(call force,CFG_TEE_CORE_NB_CORE,8) 40 $(call force,CFG_WITH_LPAE,y) [all …]
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/optee_os/core/arch/arm/plat-zynqmp/ |
A D | conf.mk | 5 $(call force,CFG_TEE_CORE_NB_CORE,4) 6 $(call force,CFG_CDNS_UART,y) 7 $(call force,CFG_GIC,y) 8 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 9 $(call force,CFG_WITH_ARM_TRUSTED_FW,y) 15 $(call force,CFG_CORE_ASLR,n) 18 $(call force,CFG_WITH_LPAE,y) 23 $(call force,CFG_ARM32_core,y) 55 $(call force,CFG_ZYNQMP_HUK,y,Mandated by CFG_RPMB_FS) 59 $(call force,CFG_ZYNQMP_CSU_AES,y,Mandated by CFG_ZYNQMP_HUK) [all …]
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/optee_os/core/arch/arm/plat-uniphier/ |
A D | conf.mk | 6 $(call force,CFG_TEE_CORE_NB_CORE,4) 7 $(call force,CFG_CORE_ARM64_PA_BITS,36) 14 $(call force,CFG_TEE_CORE_NB_CORE,2) 29 $(call force,CFG_HWSUPP_MEM_PERM_PXN,y) 30 $(call force,CFG_GIC,y) 31 $(call force,CFG_ARM_GICV3,y) 32 $(call force,CFG_8250_UART,y) 34 $(call force,CFG_WITH_ARM_TRUSTED_FW,y) 35 $(call force,CFG_CORE_CLUSTER_SHIFT,1) 40 $(call force,CFG_WITH_LPAE,y) [all …]
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/optee_os/core/arch/arm/plat-rzn1/ |
A D | conf.mk | 5 $(call force,CFG_ARM32_core,y) 6 $(call force,CFG_TEE_CORE_NB_CORE,2) 7 $(call force,CFG_BOOT_SECONDARY_REQUEST,y) 8 $(call force,CFG_SECONDARY_INIT_CNTFRQ,y) 9 $(call force,CFG_PSCI_ARM32,y) 10 $(call force,CFG_16550_UART,y) 11 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 12 $(call force,CFG_WITH_PAGER,n) 13 $(call force,CFG_GIC,y) 14 $(call force,CFG_SM_PLATFORM_HANDLER,y) [all …]
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/optee_os/core/arch/arm/plat-vexpress/ |
A D | conf.mk | 20 $(call force,CFG_SCTLR_ALIGNMENT_CHECK,n) 36 $(call force,CFG_WITH_ARM_TRUSTED_FW,y) 39 $(call force,CFG_GIC,y) 40 $(call force,CFG_PL011,y) 52 $(call force,CFG_WITH_LPAE,y) 54 $(call force,CFG_ARM32_core,y) 73 $(call force,CFG_CORE_ARM64_PA_BITS,36) 84 $(call force,CFG_CORE_ARM64_PA_BITS,36) 108 $(call force,CFG_PSCI_ARM32,y) 109 $(call force,CFG_DT,y) [all …]
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/optee_os/core/arch/arm/plat-totalcompute/ |
A D | conf.mk | 6 $(call force,CFG_WITH_ARM_TRUSTED_FW,y) 7 $(call force,CFG_GENERIC_BOOT,y) 9 $(call force,CFG_GIC,n) 10 $(call force,CFG_ARM_GICV3,n) 12 $(call force,CFG_GIC,y) 13 $(call force,CFG_ARM_GICV3,y) 15 $(call force,CFG_PL011,y) 16 $(call force,CFG_PM_STUBS,y) 18 $(call force,CFG_ARM64_core,y) 19 $(call force,CFG_WITH_LPAE,y) [all …]
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/optee_os/core/arch/arm/plat-rpi3/ |
A D | conf.mk | 3 $(call force,CFG_TEE_CORE_NB_CORE,4) 11 $(call force,CFG_8250_UART,y) 12 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 13 $(call force,CFG_WITH_ARM_TRUSTED_FW,y) 16 $(call force,CFG_WITH_LPAE,y) 18 $(call force,CFG_ARM32_core,y) 31 $(call force,CFG_CRYPTO_SHA256_ARM32_CE,n) 32 $(call force,CFG_CRYPTO_SHA256_ARM64_CE,n) 33 $(call force,CFG_CRYPTO_SHA1_ARM32_CE,n) 34 $(call force,CFG_CRYPTO_SHA1_ARM64_CE,n) [all …]
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/optee_os/core/arch/arm/plat-k3/ |
A D | conf.mk | 12 $(call force,CFG_TEE_CORE_NB_CORE,8) 13 $(call force,CFG_8250_UART,y) 14 $(call force,CFG_HWSUPP_MEM_PERM_PXN,y) 15 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 16 $(call force,CFG_WITH_ARM_TRUSTED_FW,y) 17 $(call force,CFG_GIC,y) 18 $(call force,CFG_ARM_GICV3,y) 19 $(call force,CFG_CORE_CLUSTER_SHIFT,1) 22 $(call force,CFG_WITH_LPAE,y) 24 $(call force,CFG_ARM32_core,y)
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/optee_os/core/arch/arm/plat-rockchip/ |
A D | conf.mk | 3 $(call force,CFG_GIC,y) 4 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 5 $(call force,CFG_8250_UART,y) 13 $(call force,CFG_TEE_CORE_NB_CORE,4) 14 $(call force,CFG_PSCI_ARM32,y) 15 $(call force,CFG_BOOT_SECONDARY_REQUEST,y) 31 $(call force,CFG_TEE_CORE_NB_CORE,6) 32 $(call force,CFG_ARM_GICV3,y) 48 $(call force,CFG_TEE_CORE_NB_CORE,4) 59 $(call force,CFG_ARM64_core,y) [all …]
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/optee_os/core/drivers/crypto/se050/ |
A D | crypto.mk | 3 $(call force,CFG_CRYPTO_DRIVER,y) 36 $(call force,CFG_SCP03_PTA,y,Mandated by CFG_NXP_SE05X_SCP03) 42 $(call force,CFG_APDU_PTA,y,Mandated by CFG_NXP_SE05X_APDU) 48 $(call force,CFG_WITH_SOFTWARE_PRNG,n) 51 se050-one-enabled = $(call cfg-one-enabled, \ 56 $(call force,CFG_NXP_SE05X_ACIPHER_DRV,$(call se050-one-enabled,RSA ECC)) 60 $(call force,CFG_CRYPTO_DRV_ACIPHER,y,Mandated by CFG_NXP_SE05X_ACIPHER_DRV) 66 $(call force,CFG_CRYPTO_DRV_RSA,y) 72 $(call force,CFG_CRYPTO_DRV_ECC,y) 77 $(call force,CFG_NXP_SE05X_CIPHER_DRV,$(call se050-one-enabled,CTR)) [all …]
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/optee_os/core/arch/arm/plat-synquacer/ |
A D | conf.mk | 3 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 4 $(call force,CFG_GIC,y) 5 $(call force,CFG_PL011,y) 8 $(call force,CFG_TEE_CORE_NB_CORE,24) 15 $(call force,CFG_WITH_ARM_TRUSTED_FW,y) 17 $(call force,CFG_WITH_LPAE,y) 18 $(call force,CFG_ARM64_core,y) 22 $(call force,CFG_ARM_GICV3,y) 23 $(call force,CFG_CORE_CLUSTER_SHIFT,1)
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/optee_os/core/arch/arm/plat-sunxi/ |
A D | conf.mk | 3 $(call force,CFG_SECURE_TIME_SOURCE_CNTPCT,y) 4 $(call force,CFG_8250_UART,y) 8 $(call force,CFG_SUN8I_H2_PLUS,y) 9 $(call force,CFG_ARM32_core,y) 10 $(call force,CFG_GIC,y) 11 $(call force,CFG_WITH_LPAE,n) 12 $(call force,CFG_WITH_PAGER,n) 31 $(call force,CFG_ARM64_core,y) 32 $(call force,CFG_WITH_LPAE,y) 43 $(call force,CFG_WITH_ARM_TRUSTED_FW,y)
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