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Searched refs:core_mmu_get_va (Results 1 – 25 of 38) sorted by relevance

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/optee_os/core/arch/arm/plat-imx/pm/
A Dcpuidle-imx7d.c38 core_mmu_get_va(TRUSTZONE_OCRAM_START + in imx7d_cpuidle_init()
53 p->ddrc_va_base = core_mmu_get_va(DDRC_BASE, MEM_AREA_IO_SEC, 1); in imx7d_cpuidle_init()
55 p->ccm_va_base = core_mmu_get_va(CCM_BASE, MEM_AREA_IO_SEC, 1); in imx7d_cpuidle_init()
59 p->src_va_base = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, 1); in imx7d_cpuidle_init()
61 p->iomuxc_gpr_va_base = core_mmu_get_va(IOMUXC_GPR_BASE, in imx7d_cpuidle_init()
64 p->gpc_va_base = core_mmu_get_va(GPC_BASE, MEM_AREA_IO_SEC, 1); in imx7d_cpuidle_init()
66 p->gic_va_base = core_mmu_get_va(GIC_BASE, MEM_AREA_IO_SEC, 1); in imx7d_cpuidle_init()
94 cpuidle_ocram_base = core_mmu_get_va(TRUSTZONE_OCRAM_START + in imx_pen_lock()
126 cpuidle_ocram_base = core_mmu_get_va(TRUSTZONE_OCRAM_START + in imx_pen_unlock()
141 vaddr_t src_a7rcr1 = core_mmu_get_va(SRC_BASE + SRC_A7RCR1, in get_online_cpus()
[all …]
A Dpm-imx7.c149 core_mmu_get_va(TRUSTZONE_OCRAM_START + SUSPEND_OCRAM_OFFSET, in imx7_suspend_init()
162 p->ccm_va_base = core_mmu_get_va(CCM_BASE, MEM_AREA_IO_SEC, 1); in imx7_suspend_init()
164 p->ddrc_va_base = core_mmu_get_va(DDRC_BASE, MEM_AREA_IO_SEC, 1); in imx7_suspend_init()
166 p->ddrc_phy_va_base = core_mmu_get_va(DDRC_PHY_BASE, MEM_AREA_IO_SEC, in imx7_suspend_init()
169 p->src_va_base = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, 1); in imx7_suspend_init()
171 p->iomuxc_gpr_va_base = core_mmu_get_va(IOMUXC_GPR_BASE, in imx7_suspend_init()
174 p->gpc_va_base = core_mmu_get_va(GPC_BASE, MEM_AREA_IO_SEC, 1); in imx7_suspend_init()
176 p->anatop_va_base = core_mmu_get_va(ANATOP_BASE, MEM_AREA_IO_SEC, 1); in imx7_suspend_init()
178 p->snvs_va_base = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC, 1); in imx7_suspend_init()
180 p->lpsr_va_base = core_mmu_get_va(LPSR_BASE, MEM_AREA_IO_SEC, 1); in imx7_suspend_init()
[all …]
A Dpsci.c59 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, 1); in psci_cpu_on()
119 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, 1); in psci_affinity_info()
120 vaddr_t gpr5 = core_mmu_get_va(IOMUXC_BASE, MEM_AREA_IO_SEC, in psci_affinity_info()
169 vaddr_t snvs_base = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC, 1); in psci_system_off()
A Dimx7_suspend.c31 uint32_t suspend_ocram_base = core_mmu_get_va(TRUSTZONE_OCRAM_START + in imx7_cpu_suspend()
A Dgpcv2.c16 return core_mmu_get_va(GPC_BASE, MEM_AREA_IO_SEC, 1); in gpc_base()
/optee_os/core/drivers/
A Dzynqmp_csu_puf.c31 vaddr_t puf = core_mmu_get_va(ZYNQMP_CSU_PUF_BASE, MEM_AREA_IO_SEC, in zynqmp_csu_puf_regenerate()
33 vaddr_t csu = core_mmu_get_va(CSU_BASE, MEM_AREA_IO_SEC, CSU_SIZE); in zynqmp_csu_puf_regenerate()
55 vaddr_t puf = core_mmu_get_va(ZYNQMP_CSU_PUF_BASE, MEM_AREA_IO_SEC, in zynqmp_csu_puf_reset()
63 vaddr_t csu = core_mmu_get_va(CSU_BASE, MEM_AREA_IO_SEC, CSU_SIZE); in zynqmp_csu_puf_init()
A Dzynqmp_csudma.c47 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in csudma_clear_intr()
61 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in zynqmp_csudma_sync()
85 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in zynqmp_csudma_prepare()
100 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in zynqmp_csudma_unprepare()
111 vaddr_t dma = core_mmu_get_va(CSUDMA_BASE, MEM_AREA_IO_SEC, in zynqmp_csudma_transfer()
A Dimx_snvs.c17 vaddr_t snvs = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC, in snvs_get_security_cfg()
37 vaddr_t snvs = core_mmu_get_va(SNVS_BASE, MEM_AREA_IO_SEC, in snvs_get_ssm_mode()
A Dimx_ocotp.c32 vaddr_t va = core_mmu_get_va(CCM_BASE, MEM_AREA_IO_SEC, CCM_SIZE); in ocotp_clock_enable()
39 vaddr_t va = core_mmu_get_va(CCM_BASE, MEM_AREA_IO_SEC, CCM_SIZE); in ocotp_clock_enable()
47 vaddr_t va = core_mmu_get_va(CCM_BASE, MEM_AREA_IO_SEC, CCM_SIZE); in ocotp_clock_enable()
252 g_base_addr = core_mmu_get_va(OCOTP_BASE, MEM_AREA_IO_SEC, OCOTP_SIZE); in imx_ocotp_init()
A Dzynqmp_csu_aes.c48 vaddr_t aes = core_mmu_get_va(ZYNQMP_CSU_AES_BASE, MEM_AREA_IO_SEC, in aes_wait()
209 vaddr_t aes = core_mmu_get_va(ZYNQMP_CSU_AES_BASE, MEM_AREA_IO_SEC, in aes_prepare_op()
211 vaddr_t csu = core_mmu_get_va(CSU_BASE, MEM_AREA_IO_SEC, CSU_SIZE); in aes_prepare_op()
251 vaddr_t aes = core_mmu_get_va(ZYNQMP_CSU_AES_BASE, MEM_AREA_IO_SEC, in aes_done_op()
/optee_os/core/arch/arm/plat-rzn1/
A Dmain.c70 tza_init_reg = core_mmu_get_va(FW_STATIC_TZA_INIT, MEM_AREA_IO_SEC, in rzn1_tz_init()
72 tza_targ_reg = core_mmu_get_va(FW_STATIC_TZA_TARG, MEM_AREA_IO_SEC, in rzn1_tz_init()
96 cm3_pwrctrl_reg = core_mmu_get_va(SYSCTRL_PWRCTRL_CM3, MEM_AREA_IO_SEC, in rzn1_cm3_start()
98 cm3_pwrstat_reg = core_mmu_get_va(SYSCTRL_PWRSTAT_CM3, MEM_AREA_IO_SEC, in rzn1_cm3_start()
A Dpsci.c45 vaddr_t sctl_va = core_mmu_get_va(SYSCTRL_BOOTADDR_REG, in psci_cpu_on()
78 io_setbits32(core_mmu_get_va(SYSCTRL_REG_RSTEN, MEM_AREA_IO_SEC, in psci_system_reset()
83 io_setbits32(core_mmu_get_va(SYSCTRL_REG_RSTCTRL, MEM_AREA_IO_SEC, in psci_system_reset()
/optee_os/core/arch/arm/plat-hikey/
A Dmain.c56 vaddr_t peri_base = core_mmu_get_va(PERI_BASE, MEM_AREA_IO_NSEC, in spi_init()
58 vaddr_t pmx0_base = core_mmu_get_va(PMX0_BASE, MEM_AREA_IO_NSEC, in spi_init()
60 vaddr_t pmx1_base = core_mmu_get_va(PMX1_BASE, MEM_AREA_IO_NSEC, in spi_init()
124 vaddr_t pmussi_base = core_mmu_get_va(PMUSSI_BASE, MEM_AREA_IO_NSEC, in peripherals_init()
A Dspi_test.c23 vaddr_t gpio6_base = core_mmu_get_va(GPIO6_BASE, MEM_AREA_IO_NSEC, in spi_cs_callback()
25 vaddr_t spi_base = core_mmu_get_va(SPI_BASE, MEM_AREA_IO_NSEC, in spi_cs_callback()
50 vaddr_t pmx0_base = core_mmu_get_va(PMX0_BASE, MEM_AREA_IO_NSEC, in spi_set_cs_mux()
71 vaddr_t spi_base = core_mmu_get_va(SPI_BASE, MEM_AREA_IO_NSEC, in spi_test_with_manual_cs_control()
160 vaddr_t spi_base = core_mmu_get_va(SPI_BASE, MEM_AREA_IO_NSEC, in spi_test_with_registered_cs_cb()
207 vaddr_t gpio6_base = core_mmu_get_va(GPIO6_BASE, MEM_AREA_IO_NSEC, in spi_test_with_builtin_cs_control()
209 vaddr_t spi_base = core_mmu_get_va(SPI_BASE, MEM_AREA_IO_NSEC, in spi_test_with_builtin_cs_control()
/optee_os/core/arch/arm/plat-hisilicon/
A Dpsci.c50 vaddr_t sysctrl = core_mmu_get_va(SYS_CTRL_BASE, MEM_AREA_IO_SEC, in psci_system_reset()
67 vaddr_t bootsram = core_mmu_get_va(BOOTSRAM_BASE, MEM_AREA_IO_SEC, in psci_cpu_on()
69 vaddr_t crg = core_mmu_get_va(CPU_CRG_BASE, MEM_AREA_IO_SEC, in psci_cpu_on()
/optee_os/core/arch/arm/plat-aspeed/
A Dplatform_ast2600.c77 gicc_base = core_mmu_get_va(GIC_BASE + GICC_OFFSET, in main_init_gic()
79 gicd_base = core_mmu_get_va(GIC_BASE + GICD_OFFSET, in main_init_gic()
109 ahbc_virt = core_mmu_get_va(AHBC_BASE, in plat_primary_init_early()
/optee_os/core/arch/arm/plat-imx/
A Dmain.c123 gicd_base = core_mmu_get_va(GICD_BASE, MEM_AREA_IO_SEC, 0x10000); in main_init_gic()
135 gicc_base = core_mmu_get_va(GIC_BASE + GICC_OFFSET, MEM_AREA_IO_SEC, in main_init_gic()
137 gicd_base = core_mmu_get_va(GIC_BASE + GICD_OFFSET, MEM_AREA_IO_SEC, in main_init_gic()
A Dimx_src.c13 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, 1); in imx_get_src_gpr()
23 vaddr_t va = core_mmu_get_va(SRC_BASE, MEM_AREA_IO_SEC, 1); in imx_set_src_gpr()
A Dimx-common.c32 addr = core_mmu_get_va(ANATOP_BASE, MEM_AREA_IO_SEC, 0x1000); in imx_get_digprog()
43 addr = core_mmu_get_va(OCOTP_BASE, MEM_AREA_IO_SEC, OCOTP_SIZE); in imx_get_digprog()
A Dmmdc.c29 mmdc_base = core_mmu_get_va(MMDC_P0_BASE, MEM_AREA_IO_SEC, in imx_get_ddr_type()
/optee_os/core/arch/arm/plat-imx/drivers/
A Dtzc380.c32 addr[0] = core_mmu_get_va(TZASC_BASE, MEM_AREA_IO_SEC, 1); in imx_configure_tzasc()
37 addr[1] = core_mmu_get_va(TZASC2_BASE, MEM_AREA_IO_SEC, 1); in imx_configure_tzasc()
A Dimx_scu.c15 vaddr_t scu_base = core_mmu_get_va(SCU_BASE, MEM_AREA_IO_SEC, in scu_init()
A Dimx_caam.c24 core_mmu_get_va(CAAM_BASE, MEM_AREA_IO_SEC, in init_caam()
/optee_os/core/arch/arm/plat-sunxi/
A Dmain.c134 gicc_base = core_mmu_get_va(GIC_BASE + GICC_OFFSET, MEM_AREA_IO_SEC, 1); in main_init_gic()
135 gicd_base = core_mmu_get_va(GIC_BASE + GICD_OFFSET, MEM_AREA_IO_SEC, 1); in main_init_gic()
/optee_os/core/arch/arm/sm/
A Dpm.c48 arm_cl2_cleanbyway(core_mmu_get_va(PL310_BASE, MEM_AREA_IO_SEC, 1)); in sm_pm_cpu_suspend_save()

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