| /optee_os/core/drivers/crypto/caam/hal/imx_6_7/ |
| A D | hal_jr.c | 23 enum caam_status caam_hal_jr_setowner(vaddr_t ctrl_base, paddr_t jr_offset, in caam_hal_jr_setowner() argument
33 val = io_caam_read32(ctrl_base + JRxMIDR_MS(jr_idx)); in caam_hal_jr_setowner()
66 val = io_caam_read32(ctrl_base + JRxMIDR_LS(jr_idx)); in caam_hal_jr_setowner()
79 io_caam_write32(ctrl_base + JRxMIDR_LS(jr_idx), cfg_ls); in caam_hal_jr_setowner()
80 io_caam_write32(ctrl_base + JRxMIDR_MS(jr_idx), cfg_ms); in caam_hal_jr_setowner()
87 void caam_hal_jr_prepare_backup(vaddr_t ctrl_base, paddr_t jr_offset) in caam_hal_jr_prepare_backup() argument
91 caam_pwr_add_backup(ctrl_base + (jr_idx * JRxMIDR_SIZE), jrcfg_backup, in caam_hal_jr_prepare_backup()
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| /optee_os/core/drivers/crypto/caam/hal/imx_8m/ |
| A D | hal_jr.c | 23 enum caam_status caam_hal_jr_setowner(vaddr_t ctrl_base, paddr_t jr_offset, in caam_hal_jr_setowner() argument
33 val = io_caam_read32(ctrl_base + JRxDID_MS(jr_idx)); in caam_hal_jr_setowner()
62 val = io_caam_read32(ctrl_base + JRxDID_LS(jr_idx)); in caam_hal_jr_setowner()
75 io_caam_write32(ctrl_base + JRxDID_LS(jr_idx), cfg_ls); in caam_hal_jr_setowner()
76 io_caam_write32(ctrl_base + JRxDID_MS(jr_idx), cfg_ms); in caam_hal_jr_setowner()
83 void caam_hal_jr_prepare_backup(vaddr_t ctrl_base, paddr_t jr_offset) in caam_hal_jr_prepare_backup() argument
87 caam_pwr_add_backup(ctrl_base + (jr_idx * JRxDID_SIZE), jrcfg_backup, in caam_hal_jr_prepare_backup()
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| /optee_os/core/drivers/crypto/caam/hal/imx_8ulp/ |
| A D | hal_jr.c | 24 enum caam_status caam_hal_jr_setowner(vaddr_t ctrl_base, paddr_t jr_offset, in caam_hal_jr_setowner() argument
34 val = io_caam_read32(ctrl_base + JRxDID_MS(jr_idx)); in caam_hal_jr_setowner()
63 val = io_caam_read32(ctrl_base + JRxDID_LS(jr_idx)); in caam_hal_jr_setowner()
76 io_caam_write32(ctrl_base + JRxDID_LS(jr_idx), cfg_ls); in caam_hal_jr_setowner()
77 io_caam_write32(ctrl_base + JRxDID_MS(jr_idx), cfg_ms); in caam_hal_jr_setowner()
84 void caam_hal_jr_prepare_backup(vaddr_t ctrl_base, paddr_t jr_offset) in caam_hal_jr_prepare_backup() argument
88 caam_pwr_add_backup(ctrl_base + (jr_idx * JRxDID_SIZE), jrcfg_backup, in caam_hal_jr_prepare_backup()
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| /optee_os/core/drivers/crypto/caam/hal/common/ |
| A D | hal_cfg.c | 20 vaddr_t ctrl_base = 0; in caam_hal_cfg_get_conf() local
30 caam_hal_cfg_get_ctrl_dt(fdt, &ctrl_base); in caam_hal_cfg_get_conf()
32 if (!ctrl_base) { in caam_hal_cfg_get_conf()
33 ctrl_base = (vaddr_t)core_mmu_add_mapping(MEM_AREA_IO_SEC, in caam_hal_cfg_get_conf()
36 if (!ctrl_base) { in caam_hal_cfg_get_conf()
42 jrcfg->base = ctrl_base; in caam_hal_cfg_get_conf()
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| A D | hal_cfg_dt.c | 54 void caam_hal_cfg_get_ctrl_dt(void *fdt, vaddr_t *ctrl_base) in caam_hal_cfg_get_ctrl_dt() argument
60 *ctrl_base = 0; in caam_hal_cfg_get_ctrl_dt()
84 *ctrl_base = (vaddr_t)core_mmu_add_mapping(MEM_AREA_IO_SEC, pctrl_base, in caam_hal_cfg_get_ctrl_dt()
86 if (!*ctrl_base) { in caam_hal_cfg_get_ctrl_dt()
91 HAL_TRACE("Map Controller 0x%" PRIxVA, *ctrl_base); in caam_hal_cfg_get_ctrl_dt()
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| /optee_os/core/drivers/crypto/caam/hal/ls/ |
| A D | hal_jr.c | 14 enum caam_status caam_hal_jr_setowner(vaddr_t ctrl_base, paddr_t jr_offset, in caam_hal_jr_setowner() argument
22 val = io_caam_read32(ctrl_base + JRxMIDR_MS(jr_idx)); in caam_hal_jr_setowner()
26 io_caam_write32(ctrl_base + JRxMIDR_MS(jr_idx), val); in caam_hal_jr_setowner()
32 void caam_hal_jr_prepare_backup(vaddr_t ctrl_base __unused, in caam_hal_jr_prepare_backup()
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| /optee_os/core/drivers/crypto/caam/include/ |
| A D | caam_hal_cfg.h | 37 void caam_hal_cfg_get_ctrl_dt(void *fdt, vaddr_t *ctrl_base);
56 vaddr_t *ctrl_base) in caam_hal_cfg_get_ctrl_dt() argument
58 *ctrl_base = 0; in caam_hal_cfg_get_ctrl_dt()
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| A D | caam_hal_jr.h | 20 enum caam_status caam_hal_jr_setowner(vaddr_t ctrl_base, paddr_t jr_offset,
135 void caam_hal_jr_prepare_backup(vaddr_t ctrl_base, paddr_t jr_offset);
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| /optee_os/core/drivers/ |
| A D | ls_i2c.c | 126 vaddr_t ctrl_base = 0; in i2c_init() local
142 if (dt_map_dev(fdt, node, &ctrl_base, &size) < 0) { in i2c_init()
151 i2c_data->base = ctrl_base; in i2c_init()
153 regs = (struct i2c_regs *)ctrl_base; in i2c_init()
157 ibfd = i2c_get_ibfd(ctrl_base, clock_divisor); in i2c_init()
161 i2c_reset(ctrl_base); in i2c_init()
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| A D | ls_gpio.c | 181 vaddr_t ctrl_base = 0; in get_info_from_device_tree() local
197 if (dt_map_dev(fdt, node, &ctrl_base, &size) < 0) { in get_info_from_device_tree()
206 gpio_data->gpio_base = ctrl_base; in get_info_from_device_tree()
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| A D | ls_dspi.c | 536 vaddr_t ctrl_base = 0; in get_info_from_device_tree() local
559 if (dt_map_dev(fdt, node, &ctrl_base, &size) < 0) { in get_info_from_device_tree()
567 dspi_data->base = ctrl_base; in get_info_from_device_tree()
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| /optee_os/core/drivers/crypto/caam/hal/imx_8q/ |
| A D | hal_jr.c | 11 enum caam_status caam_hal_jr_setowner(vaddr_t ctrl_base __unused, in caam_hal_jr_setowner()
28 void caam_hal_jr_prepare_backup(vaddr_t ctrl_base __unused, in caam_hal_jr_prepare_backup()
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