Searched refs:mux (Results 1 – 5 of 5) sorted by relevance
| /optee_os/core/drivers/clk/sam/ |
| A D | at91_i2s_mux.c | 23 struct clk_i2s_mux *mux = clk->priv; in clk_i2s_mux_get_parent() local
24 uint32_t val = io_read32(mux->sfr_base + AT91_SFR_I2SCLKSEL); in clk_i2s_mux_get_parent()
26 return (val & BIT(mux->bus_id)) >> mux->bus_id; in clk_i2s_mux_get_parent()
31 struct clk_i2s_mux *mux = clk->priv; in clk_i2s_mux_set_parent() local
33 io_clrsetbits32(mux->sfr_base + AT91_SFR_I2SCLKSEL, in clk_i2s_mux_set_parent()
34 BIT(mux->bus_id), index << mux->bus_id); in clk_i2s_mux_set_parent()
|
| /optee_os/core/arch/arm/dts/ |
| A D | fsl-lx2160a-qds.dts | 33 mdio-mux-1 {
34 compatible = "mdio-mux-multiplexer";
35 mux-controls = <&mux 0>;
101 mdio-mux-2 {
102 compatible = "mdio-mux-multiplexer";
103 mux-controls = <&mux 1>;
230 mux: mux-controller { label
231 compatible = "reg-mux";
232 #mux-control-cells = <1>;
233 mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */
[all …]
|
| A D | fsl-lx2160a-rdb.dts | 82 i2c-mux@77 {
|
| A D | stm32mp151.dtsi | 358 clock-names = "mux";
1135 clock-names = "mux";
1162 clock-names = "mux";
1182 clock-names = "mux";
1196 clock-names = "mux";
|
| /optee_os/core/drivers/ |
| A D | imx_i2c.c | 416 struct imx_i2c_mux *mux = &i2c_mux; in imx_i2c_init() local
427 io_write32(mux->base.va + mux->i2c[bid].scl_mux, I2C_MUX_VAL(bid)); in imx_i2c_init()
428 io_write32(mux->base.va + mux->i2c[bid].scl_cfg, I2C_CFG_VAL(bid)); in imx_i2c_init()
429 if (mux->i2c[bid].scl_inp) in imx_i2c_init()
430 io_write32(mux->base.va + mux->i2c[bid].scl_inp, in imx_i2c_init()
433 io_write32(mux->base.va + mux->i2c[bid].sda_mux, I2C_MUX_VAL(bid)); in imx_i2c_init()
434 io_write32(mux->base.va + mux->i2c[bid].sda_cfg, I2C_CFG_VAL(bid)); in imx_i2c_init()
435 if (mux->i2c[bid].sda_inp) in imx_i2c_init()
436 io_write32(mux->base.va + mux->i2c[bid].sda_inp, in imx_i2c_init()
|
Completed in 6 milliseconds