Searched refs:rcc_base (Results 1 – 3 of 3) sorted by relevance
40 vaddr_t rcc_base = stm32_rcc_base(); in stm32_reset_assert() local42 io_write32(rcc_base + offset, bitmsk); in stm32_reset_assert()47 while (!(io_read32(rcc_base + offset) & bitmsk)) in stm32_reset_assert()51 if (!(io_read32(rcc_base + offset) & bitmsk)) in stm32_reset_assert()62 vaddr_t rcc_base = stm32_rcc_base(); in stm32_reset_deassert() local64 io_write32(rcc_base + offset, bitmsk); in stm32_reset_deassert()69 while ((io_read32(rcc_base + offset) & bitmsk)) in stm32_reset_deassert()73 if (io_read32(rcc_base + offset) & bitmsk) in stm32_reset_deassert()82 vaddr_t rcc_base = stm32_rcc_base(); in stm32_reset_assert_deassert_mcu() local90 io_clrbits32(rcc_base + RCC_MP_GCR, RCC_MP_GCR_BOOT_MCU); in stm32_reset_assert_deassert_mcu()[all …]
630 vaddr_t rcc_base = stm32_rcc_base(); in stm32mp1_clk_get_parent() local736 vaddr_t rcc_base = stm32_rcc_base(); in get_clock_rate() local741 reg = io_read32(rcc_base + RCC_MPCKSELR); in get_clock_rate()753 reg = io_read32(rcc_base + RCC_MPCKDIVR); in get_clock_rate()771 reg = io_read32(rcc_base + RCC_ASSCKSELR); in get_clock_rate()787 reg = io_read32(rcc_base + RCC_AXIDIVR); in get_clock_rate()792 reg = io_read32(rcc_base + RCC_APB4DIVR); in get_clock_rate()796 reg = io_read32(rcc_base + RCC_APB5DIVR); in get_clock_rate()827 reg = io_read32(rcc_base + RCC_MCUDIVR); in get_clock_rate()968 vaddr_t rcc_base = stm32_rcc_base(); in get_timer_rate() local[all …]
240 vaddr_t rcc_base = stm32_rcc_base(); in psci_system_reset() local244 io_write32(rcc_base + RCC_MP_GRSTCSETR, RCC_MP_GRSTCSETR_MPSYSRST); in psci_system_reset()
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