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Searched refs:ACTLR_EL1_PMSTATE_MASK (Results 1 – 3 of 3) sorted by relevance

/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/
A Dtegra_private.h25 #define ACTLR_EL1_PMSTATE_MASK (ULL(0xF) << 0) macro
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t194/drivers/mce/
A Dnvg.c197 val = read_actlr_el1() & ~ACTLR_EL1_PMSTATE_MASK; in nvg_enter_cstate()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t186/drivers/mce/
A Dnvg.c36 val = read_actlr_el1() & ~ACTLR_EL1_PMSTATE_MASK; in nvg_enter_cstate()

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