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Searched refs:ARRAY_SIZE (Results 1 – 25 of 200) sorted by relevance

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/tf-a-ffa_el3_spmc/plat/marvell/octeontx/otx2/t91/t9130_cex7_eval/board/
A Dmarvell_plat_config.c38 *size = ARRAY_SIZE(amb_memory_map_cp0); in marvell_get_amb_memory_map()
42 *size = ARRAY_SIZE(amb_memory_map_cp1); in marvell_get_amb_memory_map()
109 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map()
164 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map()
168 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map()
172 *size = ARRAY_SIZE(iob_memory_map_cp2); in marvell_get_iob_memory_map()
209 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
/tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/pm_service/
A Dpm_api_clock.c1217 .num_nodes = ARRAY_SIZE(acpu_nodes),
1338 .num_nodes = ARRAY_SIZE(ddr_nodes),
1572 .num_nodes = ARRAY_SIZE(usb_nodes),
1586 .num_nodes = ARRAY_SIZE(usb_nodes),
1600 .num_nodes = ARRAY_SIZE(usb_nodes),
1924 .num_nodes = ARRAY_SIZE(pl_nodes),
1938 .num_nodes = ARRAY_SIZE(pl_nodes),
1952 .num_nodes = ARRAY_SIZE(pl_nodes),
1966 .num_nodes = ARRAY_SIZE(pl_nodes),
2131 .num_nodes = ARRAY_SIZE(wdt_nodes),
[all …]
/tf-a-ffa_el3_spmc/plat/marvell/octeontx/otx2/t91/t9130/board/
A Dmarvell_plat_config.c32 *size = ARRAY_SIZE(amb_memory_map_cp0); in marvell_get_amb_memory_map()
86 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map()
133 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map()
137 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map()
141 *size = ARRAY_SIZE(iob_memory_map_cp2); in marvell_get_iob_memory_map()
177 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a80x0_mcbin/board/
A Dmarvell_plat_config.c67 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map()
102 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map()
142 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map()
146 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map()
185 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a80x0_puzzle/board/
A Dmarvell_plat_config.c67 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map()
106 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map()
146 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map()
150 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map()
186 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a80x0/board/
A Dmarvell_plat_config.c33 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map()
72 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map()
112 *size = ARRAY_SIZE(iob_memory_map_cp0); in marvell_get_iob_memory_map()
116 *size = ARRAY_SIZE(iob_memory_map_cp1); in marvell_get_iob_memory_map()
155 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
/tf-a-ffa_el3_spmc/plat/socionext/uniphier/
A Duniphier_boot_device.c82 assert(boot_sel < ARRAY_SIZE(uniphier_ld11_boot_device_table)); in uniphier_ld11_get_boot_device()
110 assert(boot_sel < ARRAY_SIZE(uniphier_pxs3_boot_device_table)); in uniphier_pxs3_get_boot_device()
146 assert(soc < ARRAY_SIZE(uniphier_boot_device_info)); in uniphier_get_boot_device()
149 assert(soc < ARRAY_SIZE(uniphier_boot_device_info)); in uniphier_get_boot_device()
174 assert(soc < ARRAY_SIZE(uniphier_have_onchip_scp)); in uniphier_get_boot_master()
179 assert(soc < ARRAY_SIZE(uniphier_boot_device_info)); in uniphier_get_boot_master()
A Duniphier_gicv3.c64 .interrupt_props_num = ARRAY_SIZE(uniphier_interrupt_props),
73 .interrupt_props_num = ARRAY_SIZE(uniphier_interrupt_props),
82 .interrupt_props_num = ARRAY_SIZE(uniphier_interrupt_props),
91 assert(soc < ARRAY_SIZE(uniphier_gic_driver_data)); in uniphier_gic_driver_init()
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a70x0/board/
A Dmarvell_plat_config.c33 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map()
64 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map()
91 *size = ARRAY_SIZE(iob_memory_map); in marvell_get_iob_memory_map()
126 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
/tf-a-ffa_el3_spmc/plat/marvell/armada/a8k/a70x0_amc/board/
A Dmarvell_plat_config.c30 *size = ARRAY_SIZE(amb_memory_map); in marvell_get_amb_memory_map()
61 *size = ARRAY_SIZE(io_win_memory_map); in marvell_get_io_win_memory_map()
82 *size = ARRAY_SIZE(iob_memory_map); in marvell_get_iob_memory_map()
117 *size = ARRAY_SIZE(ccu_memory_map); in marvell_get_ccu_memory_map()
/tf-a-ffa_el3_spmc/plat/arm/common/
A Darm_nor_psci_mem_protect.c105 ARRAY_SIZE(arm_ram_ranges), in arm_nor_psci_do_dyn_mem_protect()
125 ARRAY_SIZE(arm_ram_ranges)); in arm_nor_psci_do_static_mem_protect()
136 ARRAY_SIZE(arm_ram_ranges), in arm_psci_mem_protect_chk()
A Darm_ccn.c19 .num_masters = ARRAY_SIZE(master_to_rn_id_map),
23 CASSERT(PLAT_ARM_CLUSTER_COUNT == ARRAY_SIZE(master_to_rn_id_map),
/tf-a-ffa_el3_spmc/drivers/st/pmic/
A Dstpmic1.c427 .voltage_table_size = ARRAY_SIZE(buck1_voltage_table),
438 .voltage_table_size = ARRAY_SIZE(buck2_voltage_table),
449 .voltage_table_size = ARRAY_SIZE(buck3_voltage_table),
460 .voltage_table_size = ARRAY_SIZE(buck4_voltage_table),
471 .voltage_table_size = ARRAY_SIZE(ldo1_voltage_table),
480 .voltage_table_size = ARRAY_SIZE(ldo2_voltage_table),
489 .voltage_table_size = ARRAY_SIZE(ldo3_voltage_table),
498 .voltage_table_size = ARRAY_SIZE(ldo4_voltage_table),
507 .voltage_table_size = ARRAY_SIZE(ldo5_voltage_table),
516 .voltage_table_size = ARRAY_SIZE(ldo6_voltage_table),
[all …]
/tf-a-ffa_el3_spmc/plat/arm/board/rde1edge/
A Drde1edge_security.c19 .dmc_count = ARRAY_SIZE(rde1edge_dmc_base)
29 .acc_addr_count = ARRAY_SIZE(rde1edge_acc_addr_data)
/tf-a-ffa_el3_spmc/plat/arm/board/sgi575/
A Dsgi575_security.c19 .dmc_count = ARRAY_SIZE(sgi575_dmc_base)
29 .acc_addr_count = ARRAY_SIZE(sgi575_acc_addr_data)
/tf-a-ffa_el3_spmc/plat/arm/board/rdn1edge/
A Drdn1edge_security.c19 .dmc_count = ARRAY_SIZE(rdn1edge_dmc_base)
29 .acc_addr_count = ARRAY_SIZE(rdn1edge_acc_addr_data)
/tf-a-ffa_el3_spmc/include/services/
A Dsdei.h85 [PLATFORM_CORE_COUNT * ARRAY_SIZE(_private)]; \
86 sdei_entry_t sdei_shared_event_table[ARRAY_SIZE(_shared)]; \
90 .num_maps = ARRAY_SIZE(_private) \
94 .num_maps = ARRAY_SIZE(_shared) \
/tf-a-ffa_el3_spmc/plat/hisilicon/poplar/
A Dpoplar_gicv2.c27 .interrupt_props_num = ARRAY_SIZE(poplar_interrupt_props),
29 .target_masks_num = ARRAY_SIZE(target_mask_array),
/tf-a-ffa_el3_spmc/drivers/renesas/rcar/qos/M3N/
A Dqos_init_m3n_v10.c101 rcar_qos_dbsc_setting(m3n_v10_qos, ARRAY_SIZE(m3n_v10_qos), true); in qos_init_m3n_v10()
152 for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) { in qos_init_m3n_v10()
156 for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) { in qos_init_m3n_v10()
161 for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) { in qos_init_m3n_v10()
167 for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) { in qos_init_m3n_v10()
/tf-a-ffa_el3_spmc/drivers/renesas/rzg/qos/G2N/
A Dqos_init_g2n_v10.c100 rzg_qos_dbsc_setting(g2n_v10_qos, ARRAY_SIZE(g2n_v10_qos), true); in qos_init_g2n_v10()
150 for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) { in qos_init_g2n_v10()
154 for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) { in qos_init_g2n_v10()
159 for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) { in qos_init_g2n_v10()
163 for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) { in qos_init_g2n_v10()
/tf-a-ffa_el3_spmc/drivers/renesas/rcar/qos/V3M/
A Dqos_init_v3m.c65 rcar_qos_dbsc_setting(v3m_qos, ARRAY_SIZE(v3m_qos), false); in qos_init_v3m()
90 for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) { in qos_init_v3m()
94 for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) { in qos_init_v3m()
/tf-a-ffa_el3_spmc/plat/st/stm32mp1/
A Dstm32mp1_scmi.c67 assert(agent_id < ARRAY_SIZE(scmi_channel)); in plat_scmi_get_channel()
139 .clock_count = ARRAY_SIZE(stm32_scmi0_clock),
141 .rstd_count = ARRAY_SIZE(stm32_scmi0_reset_domain),
145 .clock_count = ARRAY_SIZE(stm32_scmi1_clock),
151 assert(agent_id < ARRAY_SIZE(agent_resources)); in find_resource()
162 for (n = 0U; n < ARRAY_SIZE(agent_resources); n++) { in plat_scmi_protocol_count_paranoid()
169 for (n = 0U; n < ARRAY_SIZE(agent_resources); n++) { in plat_scmi_protocol_count_paranoid()
202 const size_t count = ARRAY_SIZE(plat_protocol_list) - 1U; in plat_scmi_protocol_count()
212 (ARRAY_SIZE(plat_protocol_list) - 1U)); in plat_scmi_protocol_list()
444 for (i = 0U; i < ARRAY_SIZE(scmi_channel); i++) { in stm32mp1_init_scmi_server()
[all …]
/tf-a-ffa_el3_spmc/drivers/renesas/rcar/qos/H3/
A Dqos_init_h3n_v30.c110 rcar_qos_dbsc_setting(h3n_v30_qos, ARRAY_SIZE(h3n_v30_qos), true); in qos_init_h3n_v30()
172 for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) { in qos_init_h3n_v30()
176 for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) { in qos_init_h3n_v30()
181 for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) { in qos_init_h3n_v30()
187 for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) { in qos_init_h3n_v30()
/tf-a-ffa_el3_spmc/drivers/renesas/rzg/qos/G2H/
A Dqos_init_g2h_v30.c102 rzg_qos_dbsc_setting(g2h_v30_qos, ARRAY_SIZE(g2h_v30_qos), true); in qos_init_g2h_v30()
161 for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) { in qos_init_g2h_v30()
165 for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) { in qos_init_g2h_v30()
170 for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) { in qos_init_g2h_v30()
174 for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) { in qos_init_g2h_v30()
/tf-a-ffa_el3_spmc/drivers/renesas/rzg/qos/G2M/
A Dqos_init_g2m_v11.c106 rzg_qos_dbsc_setting(g2m_v11_qos, ARRAY_SIZE(g2m_v11_qos), false); in qos_init_g2m_v11()
160 for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) { in qos_init_g2m_v11()
164 for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) { in qos_init_g2m_v11()
169 for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) { in qos_init_g2m_v11()
173 for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) { in qos_init_g2m_v11()

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