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Searched refs:BL31_SIZE (Results 1 – 19 of 19) sorted by relevance

/tf-a-ffa_el3_spmc/plat/nxp/common/include/default/
A Dplat_default_def.h79 #ifndef BL31_SIZE
80 #define BL31_SIZE (0x200000) macro
84 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
89 #define BL32_BASE (NXP_SECURE_DRAM_ADDR + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/hisilicon/poplar/include/
A Dpoplar_layout.h92 #define BL31_SIZE 0x00014000 macro
130 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/
A Dplatform_def.h70 #define BL31_LIMIT (TZDRAM_BASE + BL31_SIZE - 1)
71 #define BL32_BASE (TZDRAM_BASE + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/qti/qtiseclib/inc/sc7180/
A Dqtiseclib_defs_plat.h14 #define BL31_SIZE 0x00100000 macro
/tf-a-ffa_el3_spmc/plat/amlogic/gxbb/
A Dgxbb_def.h27 #define BL31_SIZE UL(0x000C0000) macro
28 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/amlogic/gxl/
A Dgxl_def.h27 #define BL31_SIZE UL(0x000C0000) macro
28 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/ti/k3/include/
A Dplatform_def.h54 #define BL31_SIZE SEC_SRAM_SIZE macro
55 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/amlogic/axg/
A Daxg_def.h33 #define BL31_SIZE UL(0x00100000) macro
34 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/amlogic/g12a/
A Dg12a_def.h39 #define BL31_SIZE UL(0x00100000) macro
40 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/qemu/qemu_sbsa/include/
A Dplatform_def.h137 #define BL31_SIZE 0x300000 macro
138 #define BL31_BASE (BL31_LIMIT - BL31_SIZE)
153 BL2_SIZE - BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/socionext/synquacer/include/
A Dplatform_def.h48 #define BL31_SIZE 0x00080000 macro
49 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/qti/sc7180/inc/
A Dplatform_def.h174 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/tf-a-ffa_el3_spmc/plat/socionext/synquacer/
A Dsq_bl31_setup.c172 sq_mmap_setup(BL31_BASE, BL31_SIZE, secure_partition_mmap); in bl31_plat_arch_setup()
/tf-a-ffa_el3_spmc/plat/ti/k3/common/
A Dk3_bl31_setup.c104 MAP_REGION_FLAT(BL31_START, BL31_SIZE, MT_MEMORY | MT_RW | MT_SECURE), in bl31_plat_arch_setup()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/t210/
A Dtegra_def.h16 #define BL31_SIZE U(0x40000) macro
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/
A Dtegra_bl31_setup.c310 BL31_SIZE, in bl31_plat_arch_setup()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/t186/
A Dtegra_def.h16 #define BL31_SIZE U(0x40000) macro
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/t194/
A Dtegra_def.h15 #define BL31_SIZE U(0x40000) macro
/tf-a-ffa_el3_spmc/docs/
A Dchange-log.rst465 - Use BL31_SIZE instead of computing
1002 - The GICv2 sources list and the ``BL31_SIZE`` definition have been made

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