Searched refs:CIC_BASE (Results 1 – 4 of 4) sorted by relevance
| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/m0/src/ |
| A D | dram.c | 64 mmio_write_32(CIC_BASE + CIC_CTRL0, in m0_main()
68 while ((mmio_read_32(CIC_BASE + CIC_STATUS0) & (1 << 2)) == 0) in m0_main()
72 mmio_write_32(CIC_BASE + CIC_CTRL0, 0x20002); in m0_main()
73 while ((mmio_read_32(CIC_BASE + CIC_STATUS0) & (1 << 0)) == 0) in m0_main()
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/include/shared/ |
| A D | addressmap_shared.h | 32 #define CIC_BASE (MMIO_BASE + 0x07620000) macro
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| /tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/dram/ |
| A D | suspend.c | 552 mmio_write_32(CIC_BASE + CIC_CTRL0, in dram_switch_to_next_index()
555 while (!(mmio_read_32(CIC_BASE + CIC_STATUS0) & (1 << 2))) in dram_switch_to_next_index()
558 mmio_write_32(CIC_BASE + CIC_CTRL0, 0x20002); in dram_switch_to_next_index()
559 while (!(mmio_read_32(CIC_BASE + CIC_STATUS0) & (1 << 0))) in dram_switch_to_next_index()
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| A D | dfs.c | 1752 mmio_write_32(CIC_BASE + CIC_CTRL1, in exit_low_power()
1798 mmio_write_32(CIC_BASE + CIC_CTRL1, in resume_low_power()
1818 mmio_write_32(CIC_BASE + CIC_CG_WAIT_TH, 0x640008); in dram_low_power_config()
1825 mmio_write_32(CIC_BASE + CIC_CTRL1, 0x002a0028); in dram_low_power_config()
1831 mmio_write_32(CIC_BASE + CIC_CTRL1, 0x00150014); in dram_low_power_config()
1961 mmio_write_32(CIC_BASE + CIC_IDLE_TH, (arg0 >> 16) & 0xffff); in dram_set_odt_pd()
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