Searched refs:CPG_CPGWPR (Results 1 – 11 of 11) sorted by relevance
| /tf-a-ffa_el3_spmc/drivers/renesas/common/emmc/ |
| A D | emmc_init.c | 94 mmio_write_32(CPG_CPGWPR, (~dataL)); in emmc_dev_finalize()
107 mmio_write_32(CPG_CPGWPR, ~((uint32_t) (BIT9 | BIT0))); /* SD phy 200MHz */ in emmc_dev_init()
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| /tf-a-ffa_el3_spmc/drivers/renesas/common/ |
| A D | common.c | 20 mmio_write_32(CPG_CPGWPR, ~value); in cpg_write()
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| A D | ddr_regs.h | 254 #define CPG_CPGWPR (CPG_BASE + 0x0900U) macro
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| /tf-a-ffa_el3_spmc/plat/renesas/common/include/registers/ |
| A D | cpg_registers.h | 22 #define CPG_CPGWPR (CPG_BASE + 0x0900U) macro
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| /tf-a-ffa_el3_spmc/drivers/renesas/common/ddr/ddr_b/ |
| A D | boot_init_dram_regdef.h | 46 #define CPG_CPGWPR (CPG_BASE + 0x0900U) macro
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| A D | boot_init_dram.c | 354 mmio_write_32(CPG_CPGWPR, ~v); in cpg_write_32()
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| /tf-a-ffa_el3_spmc/drivers/renesas/common/scif/ |
| A D | scif.S | 32 #define CPG_CPGWPR (0x0900) macro
176 str w2, [x0, #CPG_CPGWPR]
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| /tf-a-ffa_el3_spmc/drivers/renesas/common/pwrc/ |
| A D | pwrc.c | 242 mmio_write_32(CPG_CPGWPR, ~on_data); in rcar_pwrc_cpuon()
264 mmio_write_32(CPG_CPGWPR, ~CPU_PWR_OFF); in rcar_pwrc_cpuoff()
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| /tf-a-ffa_el3_spmc/drivers/renesas/common/ddr/ddr_a/ |
| A D | ddr_init_e3.c | 64 mmio_write_32(CPG_CPGWPR, 0x5A5AFFFF); in init_ddr()
867 mmio_write_32(CPG_CPGWPR, 0x5A5AFFFF); in recovery_from_backup_mode()
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| /tf-a-ffa_el3_spmc/plat/renesas/rzg/ |
| A D | bl2_plat_setup.c | 912 mmio_write_32(CPG_CPGWPR, CPGWPR_PASSWORD); in bl2_el3_early_platform_setup()
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| /tf-a-ffa_el3_spmc/plat/renesas/rcar/ |
| A D | bl2_plat_setup.c | 1067 mmio_write_32(CPG_CPGWPR, CPGWPR_PASSWORD); in bl2_el3_early_platform_setup()
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