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Searched refs:CRU_CLKGATES_CON (Results 1 – 7 of 7) sorted by relevance

/tf-a-ffa_el3_spmc/plat/rockchip/px30/drivers/soc/
A Dsoc.c52 mmio_read_32(CRU_BASE + CRU_CLKGATES_CON(i)); in clk_gate_con_save()
64 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), in clk_gate_con_restore()
78 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), in clk_gate_con_disable()
A Dsoc.h64 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + (i) * 4) macro
/tf-a-ffa_el3_spmc/plat/rockchip/rk3288/drivers/soc/
A Dsoc.c149 mmio_read_32(CRU_BASE + CRU_CLKGATES_CON(i)); in clk_gate_con_save()
157 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), REG_SOC_WMSK); in clk_gate_con_disable()
165 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), in clk_gate_con_restore()
A Dsoc.h46 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4)) macro
/tf-a-ffa_el3_spmc/plat/rockchip/rk3368/drivers/soc/
A Dsoc.c164 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), 0xffff0000); in soc_sleep_config()
168 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), 0xffff0000); in soc_sleep_config()
A Dsoc.h84 #define CRU_CLKGATES_CON(i) (CRU_CLKGATE_CON + ((i) * 4)) macro
/tf-a-ffa_el3_spmc/plat/rockchip/px30/drivers/pmu/
A Dpmu.c550 mmio_read_32(CRU_BASE + CRU_CLKGATES_CON(i)); in clk_gate_suspend()
551 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), in clk_gate_suspend()
572 mmio_write_32(CRU_BASE + CRU_CLKGATES_CON(i), in clk_gate_resume()

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