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Searched refs:CRU_GLB_SRST_FST (Results 1 – 8 of 8) sorted by relevance

/tf-a-ffa_el3_spmc/plat/rockchip/px30/drivers/soc/
A Dsoc.h55 #define CRU_GLB_SRST_FST 0xb8 macro
/tf-a-ffa_el3_spmc/plat/rockchip/rk3328/drivers/soc/
A Dsoc.h37 #define CRU_GLB_SRST_FST 0x009c macro
/tf-a-ffa_el3_spmc/plat/rockchip/rk3288/drivers/soc/
A Dsoc.h49 #define CRU_GLB_SRST_FST 0x1b0 macro
/tf-a-ffa_el3_spmc/plat/rockchip/rk3368/drivers/soc/
A Dsoc.h87 #define CRU_GLB_SRST_FST 0x280 macro
/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/soc/
A Dsoc.h187 #define CRU_GLB_SRST_FST 0x0500 macro
A Dsoc.c342 mmio_write_32(CRU_BASE + CRU_GLB_SRST_FST, GLB_SRST_FST_CFG_VAL); in soc_global_soft_reset()
/tf-a-ffa_el3_spmc/plat/rockchip/rk3328/drivers/pmu/
A Dpmu.c201 mmio_write_32(CRU_BASE + CRU_GLB_SRST_FST, CRU_GLB_SRST_FST_VALUE); in rockchip_soc_soft_reset()
/tf-a-ffa_el3_spmc/plat/rockchip/px30/drivers/pmu/
A Dpmu.c1007 mmio_write_32(CRU_BASE + CRU_GLB_SRST_FST, CRU_GLB_SRST_FST_VALUE); in rockchip_soc_soft_reset()

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