Searched refs:CTX_GPREG_SP_EL0 (Results 1 – 7 of 7) sorted by relevance
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/ |
A D | tegra_fiq_glue.c | 142 val = read_ctx_reg((gpregs_ctx), (uint32_t)(CTX_GPREG_SP_EL0)); in tegra_fiq_get_intr_context()
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/tf-a-ffa_el3_spmc/services/std_svc/spm/spmc/ |
A D | spmc_setup.c | 151 write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_SP_EL0, in spmc_el0_sp_setup()
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/tf-a-ffa_el3_spmc/plat/qti/qtiseclib/src/ |
A D | qtiseclib_cb_interface.c | 178 read_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_SP_EL0); in qtiseclib_cb_get_ns_ctx()
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/tf-a-ffa_el3_spmc/services/std_svc/spm/spm_mm/ |
A D | spm_mm_main.c | 115 write_ctx_reg(get_gpregs_ctx(cpu_ctx), CTX_GPREG_SP_EL0, in spm_mm_setup()
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/tf-a-ffa_el3_spmc/include/lib/el3_runtime/aarch64/ |
A D | context.h | 48 #define CTX_GPREG_SP_EL0 U(0xf8) macro
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/tf-a-ffa_el3_spmc/services/spd/trusty/ |
A D | trusty.c | 190 uint64_t sp_el0 = read_ctx_reg(&ctx->fiq_gpregs, CTX_GPREG_SP_EL0); in trusty_get_fiq_regs()
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/tf-a-ffa_el3_spmc/lib/el3_runtime/aarch64/ |
A D | context.S | 697 str x18, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_SP_EL0] 822 ldr x28, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_SP_EL0]
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