Searched refs:CTX_SPSR_EL3 (Results 1 – 12 of 12) sorted by relevance
| /tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/ |
| A D | tegra_fiq_glue.c | 67 fiq_state[cpu].spsr_el3 = read_ctx_reg((el3state_ctx), (uint32_t)(CTX_SPSR_EL3)); in tegra_fiq_interrupt_handler()
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| /tf-a-ffa_el3_spmc/bl31/aarch64/ |
| A D | ea_delegate.S | 247 stp x2, x3, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
297 ldp x1, x2, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
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| A D | runtime_exceptions.S | 223 stp x0, x1, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
500 stp x16, x17, [x6, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
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| /tf-a-ffa_el3_spmc/plat/arm/common/aarch64/ |
| A D | execution_state_switch.c | 61 spsr = read_ctx_reg(el3_ctx, CTX_SPSR_EL3); in arm_execution_state_switch()
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| /tf-a-ffa_el3_spmc/services/spd/trusty/ |
| A D | trusty.c | 160 ctx->fiq_cpsr = SMC_GET_EL3(handle, CTX_SPSR_EL3); in trusty_fiq_handler()
181 ctx->fiq_handler_cpsr = SMC_GET_EL3(handle, CTX_SPSR_EL3); in trusty_set_fiq_handler()
312 CTX_SPSR_EL3)); in trusty_init()
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| /tf-a-ffa_el3_spmc/services/spd/tspd/ |
| A D | tspd_main.c | 194 CTX_SPSR_EL3); in tspd_sel1_interrupt_handler()
392 CTX_SPSR_EL3, in tspd_smc_handler()
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| /tf-a-ffa_el3_spmc/lib/el3_runtime/aarch64/ |
| A D | context_mgmt.c | 318 write_ctx_reg(state, CTX_SPSR_EL3, ep->spsr); in cm_setup_context()
725 write_ctx_reg(state, CTX_SPSR_EL3, spsr); in cm_set_elr_spsr_el3()
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| A D | context.S | 899 ldp x16, x17, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
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| /tf-a-ffa_el3_spmc/bl1/aarch64/ |
| A D | bl1_exceptions.S | 273 stp x16, x17, [x6, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
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| /tf-a-ffa_el3_spmc/services/std_svc/sdei/ |
| A D | sdei_intr_mgmt.c | 173 disp_ctx->spsr_el3 = read_ctx_reg(tgt_el3, CTX_SPSR_EL3); in save_event_ctx()
193 write_ctx_reg(tgt_el3, CTX_SPSR_EL3, disp_ctx->spsr_el3); in restore_event_ctx()
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| /tf-a-ffa_el3_spmc/plat/qti/qtiseclib/src/ |
| A D | qtiseclib_cb_interface.c | 137 read_ctx_reg(get_el3state_ctx(ctx), CTX_SPSR_EL3); in qtiseclib_cb_get_ns_ctx()
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| /tf-a-ffa_el3_spmc/include/lib/el3_runtime/aarch64/ |
| A D | context.h | 60 #define CTX_SPSR_EL3 U(0x18) macro
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