Home
last modified time | relevance | path

Searched refs:DDRPHYC (Results 1 – 5 of 5) sorted by relevance

/tf-a-ffa_el3_spmc/fdts/
A Dstm32mp15-ddr.dtsi18 <&rcc DDRPHYC>,
/tf-a-ffa_el3_spmc/include/dt-bindings/clock/
A Dstm32mp1-clks.h240 #define DDRPHYC 224 macro
/tf-a-ffa_el3_spmc/drivers/st/ddr/
A Dstm32mp1_ram.c32 ddrphy_clk = stm32mp_clk_get_rate(DDRPHYC); in stm32mp1_ddr_clk_enable()
A Dstm32mp1_ddr.c630 if (stm32mp_clk_get_rate(DDRPHYC) < 100000000U) { in stm32mp1_ddr3_dll_off()
/tf-a-ffa_el3_spmc/drivers/st/clk/
A Dstm32mp1_clk.c344 _CLK_FIXED(RCC_DDRITFCR, 4, DDRPHYC, _PLL2_R),
2212 DDRPHYC, DDRPHYCLP, in sync_earlyboot_clocks_state()

Completed in 14 milliseconds