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Searched refs:DDR_PHY_BASE (Results 1 – 6 of 6) sorted by relevance

/tf-a-ffa_el3_spmc/plat/rockchip/rk3368/drivers/ddr/
A Dddr_rk3368.c207 fb_div = mmio_read_32(DDR_PHY_BASE + DDR_PHY_REGEC); in ddr_get_phy_pll_freq()
253 p_ddr_reg->phyaddr = DDR_PHY_BASE; in ddr_reg_save()
343 p_ddr_reg->phy.PHY_REGDLL = mmio_read_32(DDR_PHY_BASE + in ddr_reg_save()
350 if (mmio_read_32(DDR_PHY_BASE + DDR_PHY_REG2) & 0x2) { in ddr_reg_save()
351 p_ddr_reg->phy.PHY_REGFB = mmio_read_32(DDR_PHY_BASE + in ddr_reg_save()
353 p_ddr_reg->phy.PHY_REGFC = mmio_read_32(DDR_PHY_BASE + in ddr_reg_save()
355 p_ddr_reg->phy.PHY_REGFD = mmio_read_32(DDR_PHY_BASE + in ddr_reg_save()
357 p_ddr_reg->phy.PHY_REGFE = mmio_read_32(DDR_PHY_BASE + in ddr_reg_save()
360 p_ddr_reg->phy.PHY_REGFB = mmio_read_32(DDR_PHY_BASE + in ddr_reg_save()
362 p_ddr_reg->phy.PHY_REGFC = mmio_read_32(DDR_PHY_BASE + in ddr_reg_save()
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/tf-a-ffa_el3_spmc/plat/rockchip/rk3368/
A Drk3368_def.h62 #define DDR_PHY_BASE 0xff620000 macro
/tf-a-ffa_el3_spmc/plat/rockchip/rk3328/
A Drk3328_def.h67 #define DDR_PHY_BASE 0xff400000 macro
/tf-a-ffa_el3_spmc/plat/rockchip/px30/
A Dpx30_def.h91 #define DDR_PHY_BASE 0xff2a0000 macro
/tf-a-ffa_el3_spmc/plat/rockchip/rk3328/drivers/soc/
A Dsoc.c68 MAP_REGION_FLAT(DDR_PHY_BASE, DDR_PHY_SIZE,
/tf-a-ffa_el3_spmc/plat/rockchip/rk3368/drivers/soc/
A Dsoc.c47 MAP_REGION_FLAT(DDR_PHY_BASE, DDR_PHY_SIZE,

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