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Searched refs:DEVICE1_BASE (Results 1 – 15 of 15) sorted by relevance

/tf-a-ffa_el3_spmc/plat/arm/board/fvp/
A Dfvp_def.h57 #define DEVICE1_BASE UL(0x2e000000) macro
60 #define DEVICE1_BASE BASE_GICD_BASE macro
A Dfvp_common.c47 #define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
/tf-a-ffa_el3_spmc/plat/qemu/common/
A Dqemu_common.c20 #ifdef DEVICE1_BASE
21 #define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
A Dqemu_spm.c18 #define MAP_DEVICE1_EL0 MAP_REGION_FLAT(DEVICE1_BASE, \
/tf-a-ffa_el3_spmc/plat/xilinx/versal/aarch64/
A Dversal_common.c23 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_SECURE),
/tf-a-ffa_el3_spmc/plat/xilinx/versal/include/
A Dversal_def.h35 #define DEVICE1_BASE 0xF9000000 macro
/tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/aarch64/
A Dzynqmp_common.c27 { DEVICE1_BASE, DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_SECURE },
/tf-a-ffa_el3_spmc/plat/intel/soc/common/include/
A Dplatform_def.h96 #define DEVICE1_BASE (0x80000000) macro
/tf-a-ffa_el3_spmc/plat/intel/soc/agilex/
A Dbl2_plat_setup.c37 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE,
A Dbl31_plat_setup.c121 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_NS),
/tf-a-ffa_el3_spmc/plat/intel/soc/stratix10/
A Dbl2_plat_setup.c35 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE,
A Dbl31_plat_setup.c130 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE,
/tf-a-ffa_el3_spmc/plat/qemu/qemu/include/
A Dplatform_def.h217 #define DEVICE1_BASE 0x09000000 macro
/tf-a-ffa_el3_spmc/plat/qemu/qemu_sbsa/include/
A Dplatform_def.h209 #define DEVICE1_BASE 0x60000000 macro
/tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/include/
A Dzynqmp_def.h36 #define DEVICE1_BASE U(0xF9000000) macro

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