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Searched refs:DMAC_M0_IDM_RESET_CONTROL (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/brcm/board/stingray/include/
A Dsr_def.h329 #define DMAC_M0_IDM_RESET_CONTROL (HSLS_IDM_REGS_BASE + 0x800) macro
/tf-a-ffa_el3_spmc/plat/brcm/board/stingray/src/
A Dbl31_setup.c100 mmio_setbits_32(DMAC_M0_IDM_RESET_CONTROL, 0x1); in brcm_stingray_dma_pl330_init()
103 mmio_clrbits_32(DMAC_M0_IDM_RESET_CONTROL, 0x1); in brcm_stingray_dma_pl330_init()

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