FIQ_BYP_DIS_GRP0 (reference) in projects: tf-a-ffa_el3_spmc

Searched refs:FIQ_BYP_DIS_GRP0 (Results 1 – 3 of 3) sorted by relevance

/tf-a-ffa_el3_spmc/plat/xilinx/zynqmp/aarch64/
A D	zynqmp_helpers.S	`34 orr w0, w0, #(IRQ_BYP_DIS_GRP0 \| FIQ_BYP_DIS_GRP0)`
/tf-a-ffa_el3_spmc/include/drivers/arm/
A D	gicv2.h	`76 #define FIQ_BYP_DIS_GRP0 BIT_32(5) macro`
/tf-a-ffa_el3_spmc/drivers/arm/gic/v2/
A D	gicv2_main.c	`45 val = CTLR_ENABLE_G0_BIT \| FIQ_EN_BIT \| FIQ_BYP_DIS_GRP0; in gicv2_cpuif_enable() 67 val \|= FIQ_BYP_DIS_GRP1 \| FIQ_BYP_DIS_GRP0; in gicv2_cpuif_disable()`

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