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Searched refs:GPIO_S_CNTRL_REG (Results 1 – 2 of 2) sorted by relevance

/tf-a-ffa_el3_spmc/plat/brcm/board/stingray/src/
A Dbl31_setup.c814 mmio_write_32(GPIO_S_CNTRL_REG, 0xffffffff); /* 128-140 gpio pads */ in brcm_gpio_pad_ns_init()
815 mmio_write_32(GPIO_S_CNTRL_REG + 0x4, 0xffffffff); /* 96-127 gpio pad */ in brcm_gpio_pad_ns_init()
816 mmio_write_32(GPIO_S_CNTRL_REG + 0x8, 0xffffffff); /* 64-95 gpio pad */ in brcm_gpio_pad_ns_init()
817 mmio_write_32(GPIO_S_CNTRL_REG + 0xc, 0xffffffff); /* 32-63 gpio pad */ in brcm_gpio_pad_ns_init()
818 mmio_write_32(GPIO_S_CNTRL_REG + 0x10, 0xffffffff); /* 0-31 gpio pad */ in brcm_gpio_pad_ns_init()
/tf-a-ffa_el3_spmc/plat/brcm/board/stingray/include/
A Dsr_def.h216 #define GPIO_S_CNTRL_REG 0x68b60000 macro

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