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Searched refs:GPU_RESET_BIT (Results 1 – 5 of 5) sorted by relevance

/tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/
A Dtegra_sip_calls.c86 if ((regval & GPU_RESET_BIT) == 0U) { in tegra_sip_handler()
99 if ((regval & GPU_RESET_BIT) == 0U) { in tegra_sip_handler()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/soc/t210/
A Dplat_psci_handlers.c280 val = GPU_RESET_BIT; in tegra_reset_all_dma_masters()
307 mask = GPU_RESET_BIT; in tegra_reset_all_dma_masters()
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/t210/
A Dtegra_def.h124 #define GPU_RESET_BIT (U(1) << 24) macro
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/t186/
A Dtegra_def.h242 #define GPU_RESET_BIT (U(1) << 0) macro
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/include/t194/
A Dtegra_def.h283 #define GPU_RESET_BIT (U(1) << 0) macro

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