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Searched refs:ID_AA64PFR0_GIC_SHIFT (Results 1 – 7 of 7) sorted by relevance

/tf-a-ffa_el3_spmc/plat/qti/common/inc/aarch64/
A Dplat_macros.S53 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
/tf-a-ffa_el3_spmc/plat/xilinx/versal/include/
A Dplat_macros.S44 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
/tf-a-ffa_el3_spmc/include/plat/arm/common/aarch64/
A Darm_macros.S44 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
/tf-a-ffa_el3_spmc/plat/rockchip/common/include/
A Dplat_macros.S52 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
/tf-a-ffa_el3_spmc/include/plat/marvell/armada/common/aarch64/
A Dmarvell_macros.S51 ubfx x7, x7, #ID_AA64PFR0_GIC_SHIFT, #ID_AA64PFR0_GIC_WIDTH
/tf-a-ffa_el3_spmc/include/arch/aarch64/
A Darch.h168 #define ID_AA64PFR0_GIC_SHIFT U(24) macro
/tf-a-ffa_el3_spmc/drivers/arm/gic/v3/
A Dgicv3_main.c118 (ID_AA64PFR0_GIC_MASK << ID_AA64PFR0_GIC_SHIFT)) != 0U); in gicv3_driver_init()

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