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Searched refs:INFRACFG_AO_BASE (Results 1 – 12 of 12) sorted by relevance

/tf-a-ffa_el3_spmc/plat/mediatek/mt8183/drivers/spmc/
A Dmtspmc_private.h118 #define INFRA_TOPAXI_PROTECTEN_1 (INFRACFG_AO_BASE + 0x250)
119 #define INFRA_TOPAXI_PROTECTEN_STA1_1 (INFRACFG_AO_BASE + 0x258)
120 #define INFRA_TOPAXI_PROTECTEN_1_SET (INFRACFG_AO_BASE + 0x2A8)
121 #define INFRA_TOPAXI_PROTECTEN_1_CLR (INFRACFG_AO_BASE + 0x2AC)
/tf-a-ffa_el3_spmc/plat/mediatek/common/drivers/uart/
A Duart.h17 #define UART_CLOCK_GATE_SET (INFRACFG_AO_BASE + 0x80)
18 #define UART_CLOCK_GATE_CLR (INFRACFG_AO_BASE + 0x84)
19 #define UART_CLOCK_GATE_STA (INFRACFG_AO_BASE + 0x90)
/tf-a-ffa_el3_spmc/plat/mediatek/mt8183/include/
A Dplatform_def.h16 #define INFRACFG_AO_BASE (IO_PHYS + 0x1000) macro
40 #define INFRACFG_AO_BASE (IO_PHYS + 0x1000) macro
56 #define TOP_CKMUXSEL (INFRACFG_AO_BASE + 0x0)
A Dmcucfg.h268 INFRA_TOPAXI_PROTECTEN_1 = INFRACFG_AO_BASE + 0x250,
269 INFRA_TOPAXI_PROTECTSTA1_1 = INFRACFG_AO_BASE + 0x258,
270 INFRA_TOPAXI_PROTECTEN_1_SET = INFRACFG_AO_BASE + 0x2A8,
271 INFRA_TOPAXI_PROTECTEN_1_CLR = INFRACFG_AO_BASE + 0x2AC
/tf-a-ffa_el3_spmc/plat/mediatek/mt8195/include/
A Dplatform_def.h25 #define INFRACFG_AO_BASE (IO_PHYS + 0x00001000) macro
/tf-a-ffa_el3_spmc/plat/mediatek/mt8173/include/
A Dmt8173_def.h18 #define INFRACFG_AO_BASE (IO_PHYS + 0x1000) macro
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/include/
A Dplatform_def.h40 #define INFRACFG_AO_BASE (IO_PHYS + 0x00001000) macro
/tf-a-ffa_el3_spmc/plat/mediatek/mt6795/include/
A Dplatform_def.h18 #define INFRACFG_AO_BASE (IO_PHYS + 0x1000) macro
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/spmc/
A Dmtspmc_private.h34 #define INFRACFG_AO_REG(ofs) (uint32_t)(INFRACFG_AO_BASE + (ofs))
/tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/spmc/
A Dmtspmc_private.h34 #define INFRACFG_AO_REG(ofs) (uint32_t)(INFRACFG_AO_BASE + (ofs))
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/drivers/spm/
A Dmt_spm_cond.c19 #define MT_LP_TZ_INFRA_REG(ofs) (INFRACFG_AO_BASE + ofs)
/tf-a-ffa_el3_spmc/plat/mediatek/mt8195/drivers/spm/
A Dmt_spm_cond.c19 #define MT_LP_TZ_INFRA_REG(ofs) (INFRACFG_AO_BASE + ofs)

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