Home
last modified time | relevance | path

Searched refs:IPMMUVI0_IMSCTLR (Results 1 – 3 of 3) sorted by relevance

/tf-a-ffa_el3_spmc/plat/renesas/rzg/
A Dbl2_plat_setup.c268 mmio_write_32(IPMMUVI0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
276 mmio_write_32(IPMMUVI0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
280 mmio_write_32(IPMMUVI0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
/tf-a-ffa_el3_spmc/plat/renesas/rcar/
A Dbl2_plat_setup.c280 mmio_write_32(IPMMUVI0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
288 mmio_write_32(IPMMUVI0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
292 mmio_write_32(IPMMUVI0_IMSCTLR, IMSCTLR_DISCACHE); in bl2_plat_flush_bl31_params()
/tf-a-ffa_el3_spmc/plat/renesas/common/include/
A Drcar_def.h247 #define IPMMUVI0_IMSCTLR (IPMMU_VI0_BASE + 0x0500U) macro

Completed in 8 milliseconds