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Searched refs:M0_PARAM_ADDR (Results 1 – 3 of 3) sorted by relevance

/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/pmu/
A Dm0_ctl.c61 mmio_write_32(M0_PARAM_ADDR + PARAM_M0_DONE, 0); in m0_start()
94 } while (mmio_read_32(M0_PARAM_ADDR + PARAM_M0_DONE) != M0_DONE_FLAG); in m0_wait_done()
A Dm0_ctl.h13 #define M0_PARAM_ADDR (M0_BINCODE_BASE + PARAM_ADDR) macro
/tf-a-ffa_el3_spmc/plat/rockchip/rk3399/drivers/dram/
A Ddfs.c1968 mmio_write_32(M0_PARAM_ADDR + PARAM_DPLL_CON0, FBDIV(pll_div.fbdiv)); in m0_configure_ddr()
1969 mmio_write_32(M0_PARAM_ADDR + PARAM_DPLL_CON1, in m0_configure_ddr()
1973 mmio_write_32(M0_PARAM_ADDR + PARAM_DRAM_FREQ, pll_div.mhz); in m0_configure_ddr()
1975 mmio_write_32(M0_PARAM_ADDR + PARAM_FREQ_SELECT, ddr_index << 4); in m0_configure_ddr()

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