MIDR_PN_MASK (reference) in projects: tf-a-ffa_el3_spmc

Searched refs:MIDR_PN_MASK (Results 1 – 11 of 11) sorted by relevance

/tf-a-ffa_el3_spmc/include/lib/cpus/aarch32/
A D	cpu_macros.S	`17 (MIDR_PN_MASK << MIDR_PN_SHIFT) 225 ldr r1, =((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)`
/tf-a-ffa_el3_spmc/lib/cpus/aarch64/
A D	cpuamu.c	`26 (MIDR_PN_MASK << MIDR_PN_SHIFT); in midr_match()`
/tf-a-ffa_el3_spmc/include/lib/cpus/aarch64/
A D	cpu_macros.S	`14 (MIDR_PN_MASK << MIDR_PN_SHIFT) 302 cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)`
/tf-a-ffa_el3_spmc/plat/imx/common/
A D	imx8_helpers.S	`34 cmp w0, #((\_cpu_midr >> MIDR_PN_SHIFT) & MIDR_PN_MASK)`
/tf-a-ffa_el3_spmc/plat/rockchip/common/aarch64/
A D	plat_helpers.S	`37 cmp w0, #((CORTEX_A72_MIDR >> MIDR_PN_SHIFT) & MIDR_PN_MASK)`
/tf-a-ffa_el3_spmc/plat/renesas/common/aarch64/
A D	plat_helpers.S	`349 cmp w1, #((CORTEX_A57_MIDR >> MIDR_PN_SHIFT) & MIDR_PN_MASK)`
/tf-a-ffa_el3_spmc/plat/nvidia/tegra/common/aarch64/
A D	tegra_helpers.S	`65 mov x1, #(MIDR_PN_MASK << MIDR_PN_SHIFT)`
/tf-a-ffa_el3_spmc/plat/renesas/rzg/
A D	bl2_plat_setup.c	`709 midr = reg & (MIDR_PN_MASK << MIDR_PN_SHIFT); in bl2_el3_early_platform_setup()`
/tf-a-ffa_el3_spmc/plat/renesas/rcar/
A D	bl2_plat_setup.c	`845 midr = reg & (MIDR_PN_MASK << MIDR_PN_SHIFT); in bl2_el3_early_platform_setup()`
/tf-a-ffa_el3_spmc/include/arch/aarch32/
A D	arch.h	`21 #define MIDR_PN_MASK U(0xfff) macro`
/tf-a-ffa_el3_spmc/include/arch/aarch64/
A D	arch.h	`24 #define MIDR_PN_MASK U(0xfff) macro`

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