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Searched refs:MPIDR_MT_MASK (Results 1 – 22 of 22) sorted by relevance

/tf-a-ffa_el3_spmc/plat/arm/css/common/
A Dcss_topology.c26 assert((read_mpidr_el1() & MPIDR_MT_MASK) != 0); in plat_core_pos_by_mpidr()
32 mpidr |= MPIDR_MT_MASK; in plat_core_pos_by_mpidr()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8192/
A Dplat_topology.c45 if (read_mpidr() & MPIDR_MT_MASK) { in plat_core_pos_by_mpidr()
/tf-a-ffa_el3_spmc/plat/mediatek/mt8195/
A Dplat_topology.c40 if ((read_mpidr() & MPIDR_MT_MASK) != 0) { in plat_core_pos_by_mpidr()
/tf-a-ffa_el3_spmc/plat/arm/board/arm_fpga/
A Dfpga_topology.c59 mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK); in plat_core_pos_by_mpidr()
/tf-a-ffa_el3_spmc/plat/arm/board/tc/include/
A Dtc_helpers.S35 tst x0, #MPIDR_MT_MASK
/tf-a-ffa_el3_spmc/plat/brcm/common/
A Dbrcm_gicv3.c38 mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK); in brcm_gicv3_mpidr_hash()
/tf-a-ffa_el3_spmc/plat/qti/common/src/aarch64/
A Dqti_helpers.S37 tst x1, #MPIDR_MT_MASK
/tf-a-ffa_el3_spmc/plat/arm/css/sgm/aarch64/
A Dcss_sgm_helpers.S37 tst x0, #MPIDR_MT_MASK
/tf-a-ffa_el3_spmc/plat/xilinx/versal/
A Dversal_gicv3.c58 mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK); in versal_gicv3_mpidr_hash()
/tf-a-ffa_el3_spmc/plat/marvell/armada/common/
A Dmarvell_gicv3.c60 mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK); in marvell_gicv3_mpidr_hash()
/tf-a-ffa_el3_spmc/plat/arm/board/fvp/
A Dfvp_topology.c121 mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK); in plat_core_pos_by_mpidr()
A Dfvp_gicv3.c58 temp_mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK); in fvp_gicv3_mpidr_hash()
A Dfvp_common.c363 if ((read_mpidr_el1() & MPIDR_MT_MASK) != 0U) in fvp_config_setup()
/tf-a-ffa_el3_spmc/plat/arm/board/a5ds/aarch32/
A Da5ds_helpers.S111 tst r0, #MPIDR_MT_MASK
/tf-a-ffa_el3_spmc/plat/arm/board/fvp/aarch32/
A Dfvp_helpers.S128 tst r0, #MPIDR_MT_MASK
/tf-a-ffa_el3_spmc/common/
A Dfdt_fixup.c253 reg_prop = mpidr & MPID_MASK & ~MPIDR_MT_MASK; in fdt_add_cpu()
377 (read_mpidr_el1() & MPIDR_MT_MASK); in fdt_add_cpus_node()
/tf-a-ffa_el3_spmc/plat/arm/common/
A Darm_gicv3.c73 mpidr |= (read_mpidr_el1() & MPIDR_MT_MASK); in DEFINE_LOAD_SYM_ADDR()
/tf-a-ffa_el3_spmc/plat/arm/board/fvp/aarch64/
A Dfvp_helpers.S162 tst x0, #MPIDR_MT_MASK
/tf-a-ffa_el3_spmc/plat/qti/common/src/
A Dqti_common.c62 if ((mpidr & MPIDR_MT_MASK) == 0) { /* MT not supported */ in plat_qti_my_cluster_pos()
/tf-a-ffa_el3_spmc/plat/arm/board/arm_fpga/aarch64/
A Dfpga_helpers.S135 tst x0, #MPIDR_MT_MASK
/tf-a-ffa_el3_spmc/include/arch/aarch32/
A Darch.h27 #define MPIDR_MT_MASK (U(1) << 24) macro
54 #define MPID_MASK (MPIDR_MT_MASK |\
/tf-a-ffa_el3_spmc/include/arch/aarch64/
A Darch.h30 #define MPIDR_MT_MASK (ULL(1) << 24) macro
62 #define MPID_MASK (MPIDR_MT_MASK | \

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