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Searched refs:OPERATING_FREQ (Results 1 – 3 of 3) sorted by relevance

/tf-a-ffa_el3_spmc/drivers/renesas/rcar/qos/
A Dqos_common.h45 ((SUB_SLOT_CYCLE_M3N * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
58 ((SUB_SLOT_CYCLE_H3_20 * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
64 ((SUB_SLOT_CYCLE_H3_30 * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
78 ((SUB_SLOT_CYCLE_H3N * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
95 ((SUB_SLOT_CYCLE_M3_11 * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
97 ((SUB_SLOT_CYCLE_M3_30 * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
100 #define OPERATING_FREQ 400U /* MHz */ macro
105 ((SUB_SLOT_CYCLE * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
/tf-a-ffa_el3_spmc/drivers/renesas/rzg/qos/
A Dqos_common.h35 ((SUB_SLOT_CYCLE_G2M_11 * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
37 ((SUB_SLOT_CYCLE_G2M_30 * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
50 ((SUB_SLOT_CYCLE_G2N * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
63 ((SUB_SLOT_CYCLE_G2H * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
78 #define OPERATING_FREQ 400U /* MHz */ macro
83 ((SUB_SLOT_CYCLE * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ)
/tf-a-ffa_el3_spmc/drivers/renesas/common/ddr/ddr_b/
A Dboot_init_dram.c132 #define OPERATING_FREQ (400U) /* Mhz */ macro
137 OPERATING_FREQ) /* unit:ns */

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