Searched refs:PFC_DRVCTRL18 (Results 1 – 8 of 8) sorted by relevance
199 #define PFC_DRVCTRL18 (PFC_BASE + 0x0348U) macro
1090 reg = mmio_read_32(PFC_DRVCTRL18); in pfc_init_m3n()1099 pfc_reg_write(PFC_DRVCTRL18, reg); in pfc_init_m3n()
1170 reg = mmio_read_32(PFC_DRVCTRL18); in pfc_init_g2h()1180 pfc_reg_write(PFC_DRVCTRL18, reg); in pfc_init_g2h()
1166 reg = mmio_read_32(PFC_DRVCTRL18); in pfc_init_g2n()1176 pfc_reg_write(PFC_DRVCTRL18, reg); in pfc_init_g2n()
1055 reg = mmio_read_32(PFC_DRVCTRL18); in pfc_init_h3_v1()1064 pfc_reg_write(PFC_DRVCTRL18, reg); in pfc_init_h3_v1()
1088 reg = mmio_read_32(PFC_DRVCTRL18); in pfc_init_h3_v2()1097 pfc_reg_write(PFC_DRVCTRL18, reg); in pfc_init_h3_v2()
1183 reg = mmio_read_32(PFC_DRVCTRL18); in pfc_init_m3()1192 pfc_reg_write(PFC_DRVCTRL18, reg); in pfc_init_m3()
1172 reg = mmio_read_32(PFC_DRVCTRL18); in pfc_init_g2m()1181 pfc_reg_write(PFC_DRVCTRL18, reg); in pfc_init_g2m()
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